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NON-VOLATILE SEMICONDUCTOR MEMORY

NON-VOLATILE SEMICONDUCTOR MEMORY

by OHTSUKA,NOBUAKI, MIYAKAWA,TADASHI
Year of Publication 01.09.2000

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Patent

Nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device

by OHTSUKA, NOBUAKI
Year of Publication 13.01.1999

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Patent

Level-shift circuit for driving word lines of negative gate erasable type flash memory

Level-shift circuit for driving word lines of negative gate erasable type flash memory

by OHTSUKA; NOBUAKI
Year of Publication 20.10.1998

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Patent

Nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device

by OHTSUKA; NOBUAKI
Year of Publication 22.02.1994

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Patent

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

by OHTSUKA, NOBUAKI
Year of Publication 24.02.1993

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Patent

Nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device

by OHTSUKA, NOBUAKI
Year of Publication 01.04.1992

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Patent

Nonvolatile semiconductor memory with a protect circuit

Nonvolatile semiconductor memory with a protect circuit

by OHTSUKA; NOBUAKI, MIYAKAWA; TADASHI
Year of Publication 29.06.1999

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Patent

Nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device

by MIYAMOTO, JUNICHI, OHTSUKA, NOBUAKI
Year of Publication 16.12.1998

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Patent

Nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device

by OHTSUKA; NOBUAKI, MIYAMOTO; JUNICHI
Year of Publication 02.05.1995

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Patent

Nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device

by MIYAMOTO, JUNICHI, OHTSUKA, NOBUAKI
Year of Publication 02.11.1994

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Patent

Semiconductor integrated circuit capable of preventing occurrence of erroneous operation due to noise

Semiconductor integrated circuit capable of preventing occurrence of erroneous operation due to noise

by TANAKA; SUMIO, OHTSUKA; NOBUAKI
Year of Publication 05.07.1994

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Patent

Semiconductor integrated circuit

Semiconductor integrated circuit

by MIYAMOTO; JUNICHI, OHTSUKA; NOBUAKI
Year of Publication 24.08.1993

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Patent

Semiconductor memory device with a circuit for analyzing defects in word-lines

Semiconductor memory device with a circuit for analyzing defects in word-lines

by OHTSUKA; NOBUAKI, MIYAMOTO; JUNICHI
Year of Publication 27.02.1990

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Patent

A 62-ns 16-Mb CMOS EPROM with voltage stress relaxation technique

A 62-ns 16-Mb CMOS EPROM with voltage stress relaxation technique

by Tomita, N., Ohtsuka, N., Miyamoto, J., Imamiya, K., Iyama, Y., Mori, S., Ohsima, Y., Arai, N., Kaneko, Y., Sakagami, E., Yoshikawa, K., Tanaka, S.
Published in IEEE journal of solid-state circuits (01.11.1991)

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Journal Article

Bias voltage generating circuit

Bias voltage generating circuit

by TANAKA; SUMIO, OHTSUKA; NOBUAKI, KURIYAMA; MASAO
Year of Publication 22.03.1994

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Patent

NONVOLATILE SEMICONDUCTOR MEMORY HAVING A STRESS TEST CIRCUIT

NONVOLATILE SEMICONDUCTOR MEMORY HAVING A STRESS TEST CIRCUIT

by MIYAMOTO, JUNICHI, ATSUMI, SHIGERU, OHTSUKA, NOBUAKI
Year of Publication 04.08.1993

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Patent

A 68-ns 4-Mbit CMOS EPROM with high-noise-immunity design

A 68-ns 4-Mbit CMOS EPROM with high-noise-immunity design

by Imamiya, K., Miyamoto, J., Atsumi, S., Ohtsuka, N., Muroya, Y., Sako, T., Higashino, M., Iyama, Y., Mori, S., Ohshima, Y., Araki, H., Kaneko, Y., Narita, K., Arai, N., Yoshikawa, K., Tanaka, S.
Published in IEEE journal of solid-state circuits (01.02.1990)

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Journal Article

Redundant semiconductor memory device

Redundant semiconductor memory device

by SUZUKI; NORIAKI, MIYAMOTO; JUNICHI, OHTSUKA; NOBUAKI
Year of Publication 11.06.1991

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Patent

Nonvolatile semiconductor memory having a stress test circuit

Nonvolatile semiconductor memory having a stress test circuit

by OHTSUKA; NOBUAKI, MIYAMOTO; JUNICHI, ATSUMI; SHIGERU
Year of Publication 12.03.1991

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Patent

NONVOLATILE SEMICONDUCTOR MEMORY HAVING A STRESS TEST CIRCUIT

NONVOLATILE SEMICONDUCTOR MEMORY HAVING A STRESS TEST CIRCUIT

by MIYAMOTO, JUNICHI, ATSUMI, SHIGERU, OHTSUKA, NOBUAKI
Year of Publication 19.12.1990

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Patent