Multiemitter BiCMOS logic circuit family
Boudon, G., Mollier, P., Ong, I., Nuez, J.-P., Mauchauffee, D., Plassat, D., Simonet, J.-L., Wallart, F.
Published in IEEE journal of solid-state circuits (01.04.1991)
Published in IEEE journal of solid-state circuits (01.04.1991)
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Journal Article
A 20 K CMOS array with 200-ps gate delay
Boudon, G., Mollier, P., Nuez, J.-P., Wallart, F., Bhattacharyya, A., Ogura, S.
Published in IEEE journal of solid-state circuits (01.10.1988)
Published in IEEE journal of solid-state circuits (01.10.1988)
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Journal Article
A 20K CMOS array with with 200-ps gate delay
BOUDON, G, MOLLIER, P, NUEZ, J.-P, WALLART, F, ARUP BHATTACHARYYA, OGURA, S
Published in IEEE journal of solid-state circuits (1988)
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Published in IEEE journal of solid-state circuits (1988)
Journal Article
Bipolar 72 K Bit ROM
Nuez, J.-P, Grandguillot, M.
Published in ESSCIRC '82: Eighth European Solid-State Circuits Conference (01.09.1982)
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Published in ESSCIRC '82: Eighth European Solid-State Circuits Conference (01.09.1982)
Conference Proceeding
A Method to Compensate Voltage Coefficient of Resistors
Lebesnerais, G., Nuez, J.P., Hornung, R., Delaporte, F.
Published in ESSCIRC '77: 3rd European Solid State Circuits Conference (01.09.1977)
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Published in ESSCIRC '77: 3rd European Solid State Circuits Conference (01.09.1977)
Conference Proceeding