Device and circuit-level evaluation of a zero-cost transistor architecture developed via process optimization
Devoge, Paul, Aziza, Hassen, Lorenzini, Philippe, Masson, Pascal, Malherbe, Alexandre, Julien, Franck, Marzaki, Abderrezak, Regnier, Arnaud, Niel, Stephan
Published in Solid-state electronics (01.03.2023)
Published in Solid-state electronics (01.03.2023)
Get full text
Journal Article
Digital-to-analog converters to benchmark the matching performance of a new zero-cost transistor
Devoge, Paul, Aziza, Hassen, Lorenzini, Philippe, Malherbe, Alexandre, Julien, Franck, Marzaki, Abderrezak, Regnier, Arnaud, Niel, Stephan
Published in 2022 IEEE International Symposium on Circuits and Systems (ISCAS) (28.05.2022)
Published in 2022 IEEE International Symposium on Circuits and Systems (ISCAS) (28.05.2022)
Get full text
Conference Proceeding
Morphology and reliability aspects of 40 nm eSTM™ architecture
Melul, Franck, Marca, Vincenzo Della, Bocquet, Marc, Akbal, Madjid, Laine, Pierre, Trenteseaux, Frederique, Mantelli, Marc, Hesse, Marjorie, Regnier, Arnaud, Niel, Stephan, La Rosa, Francesco
Published in Microelectronics and reliability (01.11.2021)
Published in Microelectronics and reliability (01.11.2021)
Get full text
Journal Article
A novel test structure with two active areas for eNVM reliability studies
Alkema, Khaled, Melul, Franck, Marca, Vincenzo Della, Bocquet, Marc, Akbal, Madjid, Regnier, Arnaud, Niel, Stephan, La-Rosa, Francesco
Published in 2024 IEEE 36th International Conference on Microelectronic Test Structures (ICMTS) (15.04.2024)
Published in 2024 IEEE 36th International Conference on Microelectronic Test Structures (ICMTS) (15.04.2024)
Get full text
Conference Proceeding
40nm SONOS Embedded Select in Trench Memory
Habhab, Radouane, Della Marca, Vincenzo, Masson, Pascal, Miridi, Nadia, Pribat, Clement, Jeannot, Simon, Kempf, Thibault, Mantelli, Marc, Lorenzini, Philippe, Voisin, Jean-Marc, Regnier, Arnaud, Niel, Stephan, La-Rosa, Francesco
Published in ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC) (11.09.2023)
Published in ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC) (11.09.2023)
Get full text
Conference Proceeding
TCAD investigation of zero-cost high voltage transistor architectures for logic memory circuits
Locati, Jordan, Rivero, Christian, Delalleau, Julien, Della Marca, Vincenzo, Coulie, Karine, Innocenti, Jordan, Paulet, Olivier, Regnier, Arnaud, Niel, Stephan
Published in 2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (01.09.2019)
Published in 2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (01.09.2019)
Get full text
Conference Proceeding
Gate oxide degradation assessment by electrical stress and capacitance measurements
Morillon, Dann, Masson, Pascal, Julien, Franck, Lorenzini, Philippe, Goy, Jerome, Pribat, Clement, Gourhant, Olivier, Kempf, Thibault, Ogier, Jean-Luc, Villaret, Alexandre, Ghezzi, Giada, Cherault, Nathalie, Niel, Stephan
Published in 2018 International Integrated Reliability Workshop (IIRW) (01.10.2018)
Published in 2018 International Integrated Reliability Workshop (IIRW) (01.10.2018)
Get full text
Conference Proceeding
Study of HTO-based alternative gate oxides for high voltage transistors on advanced eNVM technology
Morillon, Dann, Pribat, Clement, Julien, Franck, Cherault, Nathalie, Goy, Jerome, Gourhant, Olivier, Ogier, Jean-Luc, Masson, Pascal, Ghezzi, Giada, Kempf, Thibault, Delalleau, Julien, Villaret, Alexandre, Grenier, Jean-Christophe, Niel, Stephan
Published in 2017 IEEE International Integrated Reliability Workshop (IIRW) (01.10.2017)
Published in 2017 IEEE International Integrated Reliability Workshop (IIRW) (01.10.2017)
Get full text
Conference Proceeding
Impact of CMOS post nitridation annealing on reliability of 40nm 512kB embedded Flash array
Kempf, Thibault, Mantelli, Marc, Maugain, Francois, Regnier, Arnaud, Portal, Jean-Michel, Masson, Pascal, Moragues, Jean-Michel, Hesse, Marjorie, della Marca, Vincenzo, Julien, Franck, Niel, Stephan
Published in 2017 IEEE International Integrated Reliability Workshop (IIRW) (01.10.2017)
Published in 2017 IEEE International Integrated Reliability Workshop (IIRW) (01.10.2017)
Get full text
Conference Proceeding
Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology
Innocenti, Jordan, Welter, Loic, Julien, Franck, Lopez, Laurent, Sonzogni, Jacques, Niel, Stephan, Regnier, Arnaud, Paire, Emmanuel, Labory, Karen, Denis, Eric, Portal, Jean-Michel, Masson, Pascal
Published in 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS) (01.08.2014)
Published in 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS) (01.08.2014)
Get full text
Conference Proceeding
Thermal Disturbance 3D TCAD Simulation Study in Phase Change Memory Device
Simola, Roberto, Devoge, Paul, Boivin, Philippe, Niel, Stephan, Gonella, Roberto, Redaelli, Andrea
Published in 2022 28th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC) (28.09.2022)
Published in 2022 28th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC) (28.09.2022)
Get full text
Conference Proceeding
A Schmitt trigger to benchmark the performance of a new zero-cost transistor
Devoge, Paul, Aziza, Hassen, Lorenzini, Philippe, Masson, Pascal, Malherbe, Alexandre, Julien, Franck, Marzaki, Abderrezak, Regnier, Arnaud, Niel, Stephan
Published in 2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (24.10.2022)
Published in 2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (24.10.2022)
Get full text
Conference Proceeding
Benchmarking and optimization of trench-based multi-gate transistors in a 40 nm non-volatile memory technology
Gay, Romeric, Marca, Vincenzo Della, Aziza, Hassen, Regnier, Arnaud, Niel, Stephan, Marzaki, Abderrezak
Published in 2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) (28.06.2021)
Published in 2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) (28.06.2021)
Get full text
Conference Proceeding
Investigation of a new low cost and low consumption single poly-silicon memory
Patrick Calenzo, Jean-René Raguet, Romain Laffont, Rachid Bouchakour, Philippe Boivin, Pascal Fornara, Stephan Niel
Published in Journal of systemics, cybernetics and informatics (01.10.2010)
Get full text
Published in Journal of systemics, cybernetics and informatics (01.10.2010)
Journal Article