NMOS contact resistivity reduction with implants into silicides
Rao, K. V., Khaja, Fareen Adeni, Ni, Chi-Nung, Muthukrishnan, Shankar, Darlak, Andrew, Lei, Jianxin, Brand, Adam, Variam, Naushad
Published in Physica status solidi. C (01.01.2014)
Published in Physica status solidi. C (01.01.2014)
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Journal Article
Fin Doping by Hot Implant for 14nm FinFET Technology and Beyond
Wood, Bingxi Sun, Khaja, Fareen Adeni, Colombeau, Benjamin P, Sun, Shiyu, Waite, Andrew, Jin, Miao, Chen, Hao, Chan, Osbert, Thanigaivelan, Thirumal, Pradhan, Nilay, Gossmann, Hans-Joachim L, Sharma, Shashank, Chavva, Venkataramana R, Cai, Man-Ping, Okazaki, Motoya, Munnangi, Samuel Swaroop, Ni, Chi-Nung, Suen, Wesley, Chang, Chorng-Ping, Mayur, Abhilash, Variam, Naushad, Brand, Adam D
Published in ECS transactions (31.08.2013)
Published in ECS transactions (31.08.2013)
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Journal Article
NMOS contact engineering for CMOS scaling
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Published in 2015 15th International Workshop on Junction Technology (IWJT) (01.06.2015)
Published in 2015 15th International Workshop on Junction Technology (IWJT) (01.06.2015)
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Conference Proceeding
The effect of interfacial oxide and high-κ thickness on NMOS Vth shift from plasma-induced damage
Chih-Yang Chang, Jie Zhou, Chi-Nung Ni, Chan, Osbert, Shiyu Sun, Suen, Wesley, Mings, Sherry, Bevan, Malcolm, Liu, Patricia M., Hsieh, Peter, Chorng-Ping Chang, Hung, Raymond
Published in 2014 Silicon Nanoelectronics Workshop (SNW) (01.06.2014)
Published in 2014 Silicon Nanoelectronics Workshop (SNW) (01.06.2014)
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Conference Proceeding
3D MOSCAP Vehicle for Electrical Characterization of Sidewall Dielectrics for 3D Monolithic Integration
Wood, Bingxi, McDougall, Brendan, Chan, Osbert, Dent, Alan, Ni, Chi-Nung, Hung, Raymond, Chen, Hao, Xu, Ping, Nguyen, Phong, Okazaki, Motoya, Mao, Daxin, Xu, Xumou, Ramiraz, Ricardo, Cai, Man-Ping, Jin, Miao, Lee, Won, Noori, Atif, Shek, Meiyee, Chang, Chorng-Ping
Published in ECS transactions (01.01.2011)
Published in ECS transactions (01.01.2011)
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Journal Article
Structure and Method of Fabrication for High Performance Integrated Passive Device
Govindaraj, Rekha, Zhai, Jun, Yan, Zhuo, Huang, Long, Sinha, Saurabh P, Oliva, Antonietta, Hsieh, Chueh-An, Ramachandran, Vidhya, Ni, Chi Nung, Mandrekar, Rohan U, Gandhi, Saumya K, Yang, Yizhang
Year of Publication 14.03.2024
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Year of Publication 14.03.2024
Patent
TRANSISTORS WITH DUAL GATE CONDUCTORS, AND ASSOCIATED METHODS
Ni, Chi-Nung, Fatemizadeh, Badredin, Castro, Tom K, Zuniga, Marco A, Brand, Adam, Singh, Rajwinder, Xia, John, Xu, Min
Year of Publication 30.07.2020
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Year of Publication 30.07.2020
Patent
Transistors with dual gate conductors, and associated methods
Ni, Chi-Nung, Fatemizadeh, Badredin, Castro, Tom K, Zuniga, Marco A, Brand, Adam, Singh, Rajwinder, Xia, John, Xu, Min
Year of Publication 14.04.2020
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Year of Publication 14.04.2020
Patent
TRANSISTORS WITH DUAL GATE CONDUCTORS, AND ASSOCIATED METHODS
Ni, Chi-Nung, Fatemizadeh, Badredin, Castro, Tom K, Zuniga, Marco A, Brand, Adam, Singh, Rajwinder, Xia, John, Xu, Min
Year of Publication 05.12.2019
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Year of Publication 05.12.2019
Patent