Search Results - "NARAYANAN PRAKASH" :: K.UTB vyhledávací portál

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Efficient tile mapping simulating line-by-line convolutional neural network mapping of artificial intelligence network reasoning

by TSAI HSINYU, NARAYANAN PRAKASH, BURR GEOFFREY
Year of Publication 03.02.2023

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Patent

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MULTIPLE INPUT SIGNATURE REGISTER ANALYSIS FOR DIGITAL CIRCUITRY

by PRADEEP WILSON, MAHESHWARI NAMAN, NARAYANAN PRAKASH
Year of Publication 08.03.2018

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Patent

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Full Pad Coverage Boundary Scan

by Narayanan Prakash, Mittal Rajesh, Mehrotra Rajat
Year of Publication 15.02.2018

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Patent

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Low mammalian species richness is associated with Kyasanur Forest disease outbreak risk in deforested landscapes in the Western Ghats, India

by Walsh, Michael, Bhat, Rashmi, Nagarajan-Radha, Venkatesh, Narayanan, Prakash, Vyas, Navya, Sawleshwarkar, Shailendra, Mukhopadhyay, Chiranjay
Published in bioRxiv (18.08.2021)

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Paper

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Area efficient parallel test data path for embedded memories

by Mehrotra, Rajat, Naresh, Nikita, Sarkar, Vaskar, Narayanan, Prakash
Year of Publication 29.10.2019

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Patent

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SELF-TEST METHODS AND SYSTEMS FOR DIGITAL CIRCUITS

by PAREKHJI RUBIN AJIT, NARAYANAN PRAKASH
Year of Publication 07.01.2016

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Patent

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Full Pad Coverage Boundary Scan

by Narayanan Prakash, Mittal Rajesh, Mehrotra Rajat
Year of Publication 02.11.2017

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Patent

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FULL PAD COVERAGE BOUNDARY SCAN

by MEHROTRA, Rajat, MITTAL, Rajesh, NARAYANAN, Prakash
Year of Publication 02.11.2017

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Patent

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Full pad coverage boundary scan

by Narayanan Prakash, Mittal Rajesh, Mehrotra Rajat
Year of Publication 17.10.2017

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Patent

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Implicit vector concatenation within 2D mesh routing

by JAIN SAURABH, TSAI HSINYU, NARAYANAN PRAKASH, HOSOKAWA KOHJI, BOUR GEOFFREY
Year of Publication 17.05.2024

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Patent

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AREA-EFFICIENT PARALLEL TEST DATA PATH FOR EMBEDDED MEMORIES

by MEHROTRA, Rajat, SARKAR, Vaskar, NARAYANAN, Prakash, NARESH, Nikita
Year of Publication 03.07.2019

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Patent

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TESTING READ-ONLY MEMORY USING MEMORY BUILT-IN SELF-TEST CONTROLLER

by NARAYANAN, Naveen, Ambalametil, YARADUYATHINAHALLI, Rakesh, Channabasappa, ACHARYA, Aravinda, NARAYANAN, Prakash, SINGH, Jasbir, NARESH, Nikita, INUGANTI, Prathyusha, Teja
Year of Publication 15.12.2021

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Patent

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TESTING READ-ONLY MEMORY USING MEMORY BUILT-IN SELF-TEST CONTROLLER

by NARAYANAN, Naveen, YARADUYATHINAHALLI, Rakesh, ACHARYA, Aravinda, NARAYANAN, Prakash, SINGH, Jasbir, NARESH, Nikita, INUGANTI, Prathyusha
Year of Publication 03.12.2020

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Patent

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TESTING READ-ONLY MEMORY USING MEMORY BUILT-IN SELF-TEST CONTROLLER

by NARAYANAN, Naveen, Ambalametil, YARADUYATHINAHALLI, Rakesh, Channabasappa, ACHARYA, Aravinda, NARAYANAN, Prakash, SINGH, Jasbir, NARESH, Nikita, INUGANTI, Prathyusha, Teja
Year of Publication 08.09.2021

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Patent

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Amendments to the Canadian Patent Act to address drug access: is help on the way?

by Penner, Mark D, Narayanan, Prakash
Published in Food and drug law journal (2005)

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Journal Article

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AREA-EFFICIENT PARALLEL TEST DATA PATH FOR EMBEDDED MEMORIES

by MEHROTRA, Rajat, SARKAR, Vaskar, NARAYANAN, Prakash, NARESH, Nikita
Year of Publication 05.09.2018

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Patent

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COMPRESSED SCAN CHAIN DIAGNOSIS BY INTERNAL CHAIN OBSERVATION, PROCESSES, CIRCUITS, DEVICES AND SYSTEMS

by Subramanian, Sundarrajan, Jain, Arvind, Parekhji, Rubin A, Narayanan, Prakash
Year of Publication 26.07.2018

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Patent

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Novel self-test methods to reduce on-chip memory requirements and improved test coverage

by Narayanan, Prakash, Ravichandran, Satish, Ramayanam, Balaji
Published in 2014 IEEE 20th International On-Line Testing Symposium (IOLTS) (01.07.2014)

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Conference Proceeding

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TESTING READ-ONLY MEMORY USING BUILT-IN SELF-TEST CONTROLLER

by NARAYANAN, Naveen, YARADUYATHINAHALLI, Rakesh, ACHARYA, Aravinda, NARAYANAN, Prakash, SINGH, Jasbir, NARESH, Nikita, INUGANTI, Prathyusha
Year of Publication 07.05.2020

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Patent

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AREA EFFICIENT PARALLEL TEST DATA PATH FOR EMBEDDED MEMORIES

by Mehrotra, Rajat, Naresh, Nikita, Sarkar, Vaskar, Narayanan, Prakash
Year of Publication 21.06.2018

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Patent

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