A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS
Pons, Marc, Muller, Christoph Thomas, Ruffieux, David, Nagel, Jean-Luc, Emery, Stephane, Burg, Andreas, Tanahashi, Shuuji, Tanaka, Yoshitaka, Takeuchi, Atsushi
Published in 2019 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2019)
Published in 2019 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2019)
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Conference Proceeding
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation
Pons, Marc, Le, Thanh-Chau, Arm, Claude, Severac, Daniel, Nagel, Jean-Luc, Morgan, Marc, Emery, Stephane
Published in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (01.09.2016)
Published in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (01.09.2016)
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Conference Proceeding
Sub-threshold latch-based icyflex2 32-bit processor with wide supply range operation
Pons, Marc, Thanh-Chau Le, Arm, Claude, Severac, Daniel, Nagel, Jean-Luc, Morgan, Marc, Emery, Stephane
Published in 2016 46th European Solid-State Device Research Conference (ESSDERC) (01.09.2016)
Published in 2016 46th European Solid-State Device Research Conference (ESSDERC) (01.09.2016)
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Conference Proceeding
Static and Dynamic Power Reduction by Architecture Selection
Piguet, Christian, Schuster, Christian, Nagel, Jean-Luc
Published in Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (2006)
Published in Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (2006)
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Book Chapter
Conference Proceeding
Low-Power 32-bit Dual-MAC 120 $\mu$W/MHz 1.0 V icyflex1 DSP/MCU Core
Arm, C, Gyger, S, Masgonty, J-M, Morgan, M, Nagel, J-L, Piguet, C, Rampogna, F, Volet, P
Published in IEEE journal of solid-state circuits (01.07.2009)
Published in IEEE journal of solid-state circuits (01.07.2009)
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Journal Article
Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation
Pons, Marc, Nagel, Jean-Luc, Severac, Daniel, Morgan, Marc, Sigg, Daniel, Ruedi, Pierre-Francois, Piguet, Christian
Published in 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (01.09.2013)
Published in 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (01.09.2013)
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Conference Proceeding
아날로그 및/또는 디지털 회로의 PVT 변화를 보상하기 위한 보상 장치
RUFFIEUX DAVID, PONS SOLE MARC, PORRET ALAIN SERGE, SALAZAR GUTIERREZ CAMILO ANDRES, NAGEL JEAN LUC, SEVERAC DANIEL
Year of Publication 29.04.2019
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Year of Publication 29.04.2019
Patent
Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC
Muller, Christoph Thomas, Pons, Marc, Ruffieux, David, Nagel, Jean-Luc, Emery, Stephane, Burg, Andreas, Tanahashi, Shuuji, Tanaka, Yoshitaka, Takeuchi, Atsushi
Published in 2019 15th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) (01.07.2019)
Published in 2019 15th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) (01.07.2019)
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Conference Proceeding
PVT compensation in Mie Fujitsu 55 nm DDC: A standard-cell library based comparison
Muller, Thomas Christoph, Nagel, Jean-Luc, Pons, Marc, Severac, Daniel, Hashiba, Katsuhiro, Sawada, Shinichi, Miyatake, Katsuji, Emery, Stephane, Burg, Andreas
Published in 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2017)
Published in 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2017)
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Conference Proceeding
Maximum delay variation temperature-aware standard cell design
Pons, M., Nagel, J., Piguet, C.
Published in 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) (01.12.2012)
Published in 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) (01.12.2012)
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Conference Proceeding
Low-Power 32-bit Dual-MAC 120 μW/MHz 1.0 V icyflex1 DSP/MCU Core: Special Issue on the 34TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE (ESSCIRC)
ARM, Claude, GYGER, Stève, MASGONTY, Jean-Marc, MORGAN, Marc, NAGEL, Jean-Luc, PIGUET, Christian, RAMPOGNA, Flavio, VOLET, Patrick
Published in IEEE journal of solid-state circuits (2009)
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Published in IEEE journal of solid-state circuits (2009)
Journal Article
A low-power VLSI architecture for face verification using elastic graph matching
Nagel, Jean-Luc, Stadelmann, Patrick, Ansorge, Michael, Pellandini, Fausto
Published in 2002 11th European Signal Processing Conference (01.09.2002)
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Published in 2002 11th European Signal Processing Conference (01.09.2002)
Conference Proceeding
A multiscale morphological coprocessor for low-power face authentication
Stadelmann, Patrick, Nagel, Jean-Luc, Ansorge, Michael, Pellandini, Fausto
Published in 2002 11th European Signal Processing Conference (01.09.2002)
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Published in 2002 11th European Signal Processing Conference (01.09.2002)
Conference Proceeding
An SoC combining a 132dB QVGA pixel array and a 32b DSP/MCU processor for vision applications
Ruedi, P.-F., Heim, P., Gyger, S., Kaess, F., Arm, C., Caseiro, R., Nagel, J.-L., Todeschini, S.
Published in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2009)
Published in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2009)
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Conference Proceeding
Leakage Reduction at Architectural Level
Piguet, C., Schuster, C., Nagel, J.-L.
Published in 2006 IEEE International Conference on IC Design and Technology (2006)
Published in 2006 IEEE International Conference on IC Design and Technology (2006)
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Conference Proceeding