Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop accelerator
Ostanevich, Alexander Y, Ermolovich, Alexander V, Rozhkov, Sergey A, Scherbinin, Sergey P, Motin, Denis G, Maslennikov, Dmitry M, Chudnovets, Andrey, Iyer, Jayesh, Babayan, Boris A
Year of Publication 26.03.2019
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Year of Publication 26.03.2019
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Method to do control speculation on loads in a high performance strand-based loop accelerator
Ostanevich, Alexander Y, Ermolovich, Alexander V, Rozhkov, Sergey A, Scherbinin, Sergey P, Motin, Denis G, Maslennikov, Dmitry M, Chudnovets, Andrey, Iyer, Jayesh, Babayan, Boris A
Year of Publication 26.03.2019
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Year of Publication 26.03.2019
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Apparatus and methods to support counted loop exits in a multi-strand loop processor
Ostanevich, Alexander Y, Ermolovich, Alexander V, Rozhkov, Sergey A, Scherbinin, Sergey P, Motin, Denis G, Chudnovets, Andrey, Iyer, Jayesh, Maslennikov, Dmitry, Babayan, Boris A
Year of Publication 26.03.2019
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Year of Publication 26.03.2019
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Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processor
Ostanevich, Alexander Y, Ermolovich, Alexander V, Rozhkov, Sergey A, Scherbinin, Sergey P, Motin, Denis G, Maslennikov, Dmitry M, Chudnovets, Andrey, Iyer, Jayesh, Babayan, Boris A
Year of Publication 19.03.2019
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Year of Publication 19.03.2019
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APPARATUS AND METHODS TO SUPPORT COUNTED LOOP EXITS IN A MULTI-STRAND LOOP PROCESSOR
CHUDNOVETS, Andrey, OSTANEVICH, Alexander Y, BABAYAN, Boris A, SCHERBININ, Sergey P, MASLENNIKOV, Dmitry, ROZHKOV, Sergey A, MOTIN, Denis G, IYER, Jayesh, ERMOLOVICH, Alexander V
Year of Publication 31.10.2018
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Year of Publication 31.10.2018
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APPARATUS AND METHODS OF DECOMPOSING LOOPS TO IMPROVE PERFORMANCE AND POWER EFFICIENCY
CHUDNOVETS, Andrey, OSTANEVICH, Alexander Y, BABAYAN, Boris A, SCHERBININ, Sergey P, MASLENNIKOV, Dmitry, ROZHKOV, Sergey A, MOTIN, Denis G, IYER, Jayesh, ERMOLOVICH, Alexander V
Year of Publication 04.07.2018
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Year of Publication 04.07.2018
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APPARATUS AND METHODS TO SUPPORT COUNTED LOOP EXITS IN A MULTI-STRAND LOOP PROCESSOR
CHUDNOVETS, Andrey, OSTANEVICH, Alexander Y, BABAYAN, Boris A, SCHERBININ, Sergey P, MASLENNIKOV, Dmitry, ROZHKOV, Sergey A, MOTIN, Denis G, IYER, Jayesh, ERMOLOVICH, Alexander V
Year of Publication 04.07.2018
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Year of Publication 04.07.2018
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APPARATUS AND METHODS OF DECOMPOSING LOOPS TO IMPROVE PERFORMANCE AND POWER EFFICIENCY
Ostanevich, Alexander Y, Ermolovich, Alexander V, Rozhkov, Sergey A, Scherbinin, Sergey P, Motin, Denis G, Chudnovets, Andrey, Iyer, Jayesh, Maslennikov, Dmitry, Babayan, Boris A
Year of Publication 28.06.2018
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Year of Publication 28.06.2018
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METHOD AND APPARATUS TO CREATE REGISTER WINDOWS FOR PARALLEL ITERATIONS TO ACHIEVE HIGH PERFORMANCE IN HW-SW CODESIGNED LOOP ACCELERATOR
CHUDNOVETS, Andrey, OSTANEVICH, Alexander Y, BABAYAN, Boris A, SCHERBININ, Sergey P, MASLENNIKOV, Dmitry M, ROZHKOV, Sergey A, MOTIN, Denis G, IYER, Jayesh, ERMOLOVICH, Alexander V
Year of Publication 28.06.2018
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Year of Publication 28.06.2018
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METHOD AND APPARATUS TO EFFICIENTLY HANDLE ALLOCATION OF MEMORY ORDERING BUFFERS IN A MULTI-STRAND OUT-OF-ORDER LOOP PROCESSOR
CHUDNOVETS, Andrey, OSTANEVICH, Alexander Y, BABAYAN, Boris A, SCHERBININ, Sergey P, MASLENNIKOV, Dmitry M, ROZHKOV, Sergey A, MOTIN, Denis G, IYER, Jayesh, ERMOLOVICH, Alexander V
Year of Publication 28.06.2018
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Year of Publication 28.06.2018
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METHOD TO DO CONTROL SPECULATION ON LOADS IN A HIGH PERFORMANCE STRAND-BASED LOOP ACCELERATOR
CHUDNOVETS, Andrey, OSTANEVICH, Alexander Y, BABAYAN, Boris A, SCHERBININ, Sergey P, MASLENNIKOV, Dmitry M, ROZHKOV, Sergey A, MOTIN, Denis G, IYER, Jayesh, ERMOLOVICH, Alexander V
Year of Publication 28.06.2018
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Year of Publication 28.06.2018
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APPARATUS AND METHODS TO SUPPORT COUNTED LOOP EXITS IN A MULTI-STRAND LOOP PROCESSOR
Ostanevich, Alexander Y, Ermolovich, Alexander V, Rozhkov, Sergey A, Scherbinin, Sergey P, Motin, Denis G, Chudnovets, Andrey, Iyer, Jayesh, Maslennikov, Dmitry, Babayan, Boris A
Year of Publication 28.06.2018
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Year of Publication 28.06.2018
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METHOD AND APPARATUS TO CREATE REGISTER WINDOWS FOR PARALLEL ITERATIONS TO ACHIEVE HIGH PERFORMANCE IN HW-SW CODESIGNED LOOP ACCELERATOR
CHUDNOVETS, Andrey, OSTANEVICH, Alexander Y, BABAYAN, Boris A, SCHERBININ, Sergey P, MASLENNIKOV, Dmitry M, ROZHKOV, Sergey A, MOTIN, Denis G, IYER, Jayesh, ERMOLOVICH, Alexander V
Year of Publication 27.06.2018
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Year of Publication 27.06.2018
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INCREASING PROCESSOR INSTRUCTION WINDOW VIA SEPERATING INSTRUCTIONS ACCORDING TO CRITICALITY
MASLENNIKOV DMITRY M, GABOR RON, PODKORYTOV EVGENIY N, BUROV VALENTIN A, SCHERBININ SERGEY P, TITOV ALEXANDR, BUTUZOV ALEXANDER V, CHUDNOVETS ANDREY, SHISHLOV SERGEY Y, MOTIN DENIS G, SHIMKO OLEG, GARIFULLIN KAMIL
Year of Publication 08.06.2017
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Year of Publication 08.06.2017
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METHOD AND APPARATUS TO EFFICIENTLY HANDLE ALLOCATION OF MEMORY ORDERING BUFFERS
ANDREY CHUDNOVETS, DENIS G. MOTIN, BORIS A. BABAYAN, JAYESH IYER, SERGEY A. ROZHKOV, DMITRY M. MASLENNIKOV, ALEXANDER Y. OSTANEVICH, SERGEY P. SCHERBININ, ALEXANDER V. ERMOLOVICH
Year of Publication 03.07.2018
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Year of Publication 03.07.2018
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METHOD TO DO CONTROL SPECULATION ON LOADS IN HIGH PERFORMANCE STRAND-BASED LOOP ACCELERATOR
ANDREY CHUDNOVETS, DENIS G. MOTIN, BORIS A. BABAYAN, JAYESH IYER, SERGEY A. ROZHKOV, DMITRY M. MASLENNIKOV, ALEXANDER Y. OSTANEVICH, SERGEY P. SCHERBININ, ALEXANDER V. ERMOLOVICH
Year of Publication 03.07.2018
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Year of Publication 03.07.2018
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