Search Results - "Morrow, Michael W" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Unexpected Prevalence of eae -Positive Escherichia coli in the Animas River, Durango, Colorado

Unexpected Prevalence of eae -Positive Escherichia coli in the Animas River, Durango, Colorado

by Hamner, Steve, Fenster, Steven D, Nance, Benjamin T, McLain, Katherine A, Parrish-Larson, Kami S, Morrow, Michael W, Ford, Timothy E
Published in International journal of environmental research and public health (27.12.2019)

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Journal Article

Candida albicans Kar2 protein is essential and functions during the translocation of proteins into the endoplasmic reticulum

Candida albicans Kar2 protein is essential and functions during the translocation of proteins into the endoplasmic reticulum

by Morrow, Michael W, Janke, Megan R, Lund, Kyle, Morrison, Emily P, Paulson, Benjamin A
Published in Current genetics (01.02.2011)

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Journal Article

Dependence of endoplasmic reticulum-associated degradation on the peptide binding domain and concentration of BiP

Dependence of endoplasmic reticulum-associated degradation on the peptide binding domain and concentration of BiP

by Kabani, Mehdi, Kelley, Stephanie S, Morrow, Michael W, Montgomery, Diana L, Sivendran, Renuka, Rose, Mark D, Gierasch, Lila M, Brodsky, Jeffrey L
Published in Molecular biology of the cell (01.08.2003)

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Journal Article

Pre-boot network-based authentication

Pre-boot network-based authentication

by Geusz, Darrell, Fabro, Loic, Morrow, Michael W
Year of Publication 01.12.2020

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Patent

METHOD AND APPARATUS TO MONITOR PERFORMANCE OF A PROCESS

METHOD AND APPARATUS TO MONITOR PERFORMANCE OF A PROCESS

by MORROW, Michael, W
Year of Publication 05.04.2017

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Patent

Yeast Ribosomes Bind to Highly Purified Reconstituted Sec61p Complex and to Mammalian p180

Yeast Ribosomes Bind to Highly Purified Reconstituted Sec61p Complex and to Mammalian p180

by Morrow, Michael W., Brodsky, Jeffrey L.
Published in Traffic (Copenhagen, Denmark) (01.10.2001)

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Journal Article

ARCHITECTURE TO SUPPORT MULTIPLE CONCURRENT EXECUTION CONTEXTS ON A PROCESSOR

ARCHITECTURE TO SUPPORT MULTIPLE CONCURRENT EXECUTION CONTEXTS ON A PROCESSOR

by O'CONNOR, DENNIS, MORROW, MICHAEL, W, STRAZDUS, STEVE
Year of Publication 24.06.2015

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Patent

ARCHITECTURE TO SUPPORT MULTIPLE CONCURRENT EXECUTION CONTEXTS ON A PROCESSOR

ARCHITECTURE TO SUPPORT MULTIPLE CONCURRENT EXECUTION CONTEXTS ON A PROCESSOR

by STEVE J. STRAZDUS, MICHAEL W. MORROW, DENNIS M. O'CONNOR
Year of Publication 31.03.2017

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Patent

Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

by MORROW MICHAEL W
Year of Publication 26.10.2010

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Patent

Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

by Morrow, Michael W
Year of Publication 26.10.2010

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Patent

Methods and apparatus for low intrusion snoop invalidation

Methods and apparatus for low intrusion snoop invalidation

by DIEFFENDERFER JAMES NORRIS, MORROW MICHAEL W
Year of Publication 07.10.2014

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Patent

Moveable locked lines in a multi-level cache

Moveable locked lines in a multi-level cache

by O'Connor Dennis M, Morrow Michael W, Strazdus Stephen
Year of Publication 30.08.2016

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Patent

Switching processor threads during long latencies

Switching processor threads during long latencies

by Morrow, Michael W
Year of Publication 29.09.2009

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Patent

Switching processor threads during long latencies

Switching processor threads during long latencies

by MORROW MICHAEL W
Year of Publication 29.09.2009

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Patent

Issuing instructions to execution pipelines based on register-associated preferences, and related instruction processing circuits, processor systems, methods, and computer-readable media

Issuing instructions to execution pipelines based on register-associated preferences, and related instruction processing circuits, processor systems, methods, and computer-readable media

by Stempel Brian M, McIlvaine Michael S, Morrow Michael W, Brown Melinda J, Dieffenderfer James N
Year of Publication 02.01.2018

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Patent

LOW POWER SEMI-TRACE INSTRUCTION CACHE

LOW POWER SEMI-TRACE INSTRUCTION CACHE

by MORROW MICHAEL W
Year of Publication 08.01.2009

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Patent

Methods and apparatus to selectively power functional units

Methods and apparatus to selectively power functional units

by O'CONNOR DENNIS M, MORROW MICHAEL W, CLARK LAWRENCE T
Year of Publication 29.09.2015

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Patent

Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

by Morrow, Michael W
Year of Publication 14.10.2008

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Patent

Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

Low power semi-trace instruction/trace hybrid cache with logic for indexing the trace cache under certain conditions

by MORROW MICHAEL W
Year of Publication 14.10.2008

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Patent

Method and apparatus to write back data

Method and apparatus to write back data

by Morrow, Michael W
Year of Publication 19.08.2008

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Patent

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