Low-voltage swing logic circuits for a Pentium/spl reg/ 4 processor integer core
Deleganes, D.J., Barany, M., Geannopoulos, G., Kreitzer, K., Morrise, M., Milliron, D., Singh, A.P., Wijeratne, S.
Published in IEEE journal of solid-state circuits (01.01.2005)
Published in IEEE journal of solid-state circuits (01.01.2005)
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Journal Article
Low-voltage swing logic circuits for a Pentium® 4 processor integer core
DELEGANES, Daniel J, BARANY, Micah, GEANNOPOULOS, George, KREITZER, Kurt, MORRISE, Matthew, MILLIRON, Dan, SINGH, Anant P, WIJERATNE, Sapumal
Published in IEEE journal of solid-state circuits (2005)
Published in IEEE journal of solid-state circuits (2005)
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Conference Proceeding
Journal Article
Low-voltage swing logic circuits for a Pentium registered 4 processor integer core
Deleganes, D J, Barany, M, Geannopoulos, G, Kreitzer, K, Morrise, M, Milliron, D, Singh, AP, Wijeratne, S
Published in IEEE journal of solid-state circuits (01.01.2005)
Published in IEEE journal of solid-state circuits (01.01.2005)
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Journal Article
Scalable, sub-1W, sub-10ps clock skew, global clock distribution architecture for Intel® Core™ i7/i5/i3 microprocessors
Shamanna, G, Kurd, N, Douglas, J, Morrise, M
Published in 2010 Symposium on VLSI Circuits (01.06.2010)
Published in 2010 Symposium on VLSI Circuits (01.06.2010)
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Conference Proceeding
Clocking design automation in Intel's Core i7 and future designs
El-Husseini, A. M., Morrise, M.
Published in 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (01.11.2011)
Published in 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (01.11.2011)
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Conference Proceeding