A 32-bank 1 Gb self-strobing synchronous DRAM with 1 GByte/s bandwidth
Yoo, Jei-Hwan, Kim, Chang-Hyun, Lee, Kyu-Chan, Kyung, Kye-Hyun, Yoo, Seung-Moon, Lee, Jung-Hwa, Son, Moon-Hae, Han, Jin-Man, Kang, Bok-Moon, Haq, Ejaz, Lee, Sang-Bo, Sim, Jai-Hoon, Kim, Joung-Ho, Moon, Byung-Sik, Kim, Keum-Yong, Park, Jae-Gwan, Lee, Kyu-Phil, Lee, Kang-Yoon, Kim, Ki-Nam
Published in IEEE journal of solid-state circuits (01.11.1996)
Published in IEEE journal of solid-state circuits (01.11.1996)
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Journal Article
Degeneration technique for designing memory devices
Gajjewar, Hemangi Umakant, Chang, Ingming, Kwon, Jungtae, Pietrzyk, Cezary, Son, Moon-Hae
Year of Publication 21.04.2009
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Year of Publication 21.04.2009
Patent