14nm FDSOI technology for high speed and energy efficient applications
Weber, O., Josse, E., Andrieu, F., Cros, A., Richard, E., Perreau, P., Baylac, E., Degors, N., Gallon, C., Perrin, E., Chhun, S., Petitprez, E., Delmedico, S., Simon, J., Druais, G., Lasserre, S., Mazurier, J., Guillot, N., Bernard, E., Bianchini, R., Parmigiani, L., Gerard, X., Pribat, C., Gourhant, O., Abbate, F., Gaumer, C., Beugin, V., Gouraud, P., Maury, P., Lagrasta, S., Barge, D., Loubet, N., Beneyton, R., Benoit, D., Zoll, S., Chapon, J.-D., Babaud, L., Bidaud, M., Gregoire, M., Monget, C., Le-Gratiet, B., Brun, P., Mellier, M., Pofelski, A., Clement, L.R., Bingert, R., Puget, S., Kruck, J.-F., Hoguet, D., Scheer, P., Poiroux, T., Manceau, J.-P., Rafik, M., Rideau, D., Jaud, M.-A., Lacord, J., Monsieur, F., Grenouillet, L., Vinet, M., Liu, Q., Doris, B., Celik, M., Fetterolf, S.P., Faynot, O., Haond, M.
Published in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers (01.06.2014)
Published in 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers (01.06.2014)
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Conference Proceeding
Analysis of electromigration induced early failures in Cu interconnects for 45 nm node
Arnaud, L., Cacho, F., Doyen, L., Terrier, F., Galpin, D., Monget, C.
Published in Microelectronic engineering (01.03.2010)
Published in Microelectronic engineering (01.03.2010)
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32 nm node BEOL integration with an extreme low- k porous SiOCH dielectric k = 2.3
Hamioud, K., Arnal, V., Farcy, A., Jousseaume, V., Zenasni, A., Icard, B., Pradelles, J., Manakli, S., Brun, Ph, Imbert, G., Jayet, C., Assous, M., Maitrejean, S., Galpin, D., Monget, C., Guillan, J., Chhun, S., Richard, E., Barbier, D., Haond, M.
Published in Microelectronic engineering (01.03.2010)
Published in Microelectronic engineering (01.03.2010)
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Conference Proceeding
Analysis of electromigration induced early failures in Cu interconnects for 45nm node
Arnaud, L., Cacho, F., Doyen, L., Terrier, F., Galpin, D., Monget, C.
Published in Microelectronic engineering (01.03.2010)
Published in Microelectronic engineering (01.03.2010)
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New generation of Self Ionized Plasma copper seed for sub 40 nm nodes
Guillan, J., Haxaire, K., Chhun, S., Richard, E., Luche, M.C., Arnaud, L., Petitprez, E., Monget, C., Galpin, D., Normandon, P.
Published in Microelectronic engineering (01.05.2011)
Published in Microelectronic engineering (01.05.2011)
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Integration of SiOC air gaps in copper interconnects
Gosset, L.G, Arnal, V, Brun, Ph, Broekaart, M, Monget, C, Casanova, N, Rivoire, M, Oberlin, J.-C, Torres, J
Published in Microelectronic engineering (01.11.2003)
Published in Microelectronic engineering (01.11.2003)
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Optimization of Plasma Polymerized Methylsilane process for 248 and 193 nm lithography applications
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Journal Article
Conference Proceeding
New generation of Self Ionized Plasma copper seed for sub 40nm nodes
Guillan, J., Haxaire, K., Chhun, S., Richard, E., Luche, M.C., Arnaud, L., Petitprez, E., Monget, C., Galpin, D., Normandon, P.
Published in Microelectronic engineering (01.05.2011)
Published in Microelectronic engineering (01.05.2011)
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Copper line topology impact on the SiOCH low-k reliability in sub 45nm technology node. From the time-dependent dielectric breakdown to the product lifetime
Vilmay, M., Roy, D., Monget, C., Volpi, F., Chaix, J.-M.
Published in 2009 IEEE International Reliability Physics Symposium (01.04.2009)
Published in 2009 IEEE International Reliability Physics Symposium (01.04.2009)
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Conference Proceeding
32nm node BEOL integration with an extreme low-k porous SiOCH dielectric k=2.3
Hamioud, K., Arnal, V., Farcy, A., Jousseaume, V., Zenasni, A., Icard, B., Pradelles, J., Manakli, S., Brun, Ph, Imbert, G., Jayet, C., Assous, M., Maitrejean, S., Galpin, D., Monget, C., Guillan, J., Chhun, S., Richard, E., Barbier, D., Haond, M.
Published in Microelectronic engineering (01.03.2010)
Published in Microelectronic engineering (01.03.2010)
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Demonstration of an extendable and industrial 300mm BEOL integration for the 65-nm technology node
Hinsinger, O., Fox, R., Sabouret, E., Goldberg, C., Verove, C., Besling, W., Brun, P., Josse, E., Monget, C., Belmont, O., Van Hassel, J., Sharma, B.G., Jacquemin, J.P., Vannier, P., Humbert, A., Bunel, D., Gonella, R., Mastromatteo, E., Reber, D., Farcy, A., Mueller, J., Christie, P., Nguyen, V.H., Cregut, C., Berger, T.
Published in IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 (2004)
Published in IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 (2004)
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Conference Proceeding
Copper line topology impact on the reliability of low-k SIOCH for the 45nm technology node and beyond
Vilmay, M., Roy, D., Monget, C., Volpi, F., Chaix, J.-M.
Published in 2008 IEEE International Integrated Reliability Workshop Final Report (01.10.2008)
Published in 2008 IEEE International Integrated Reliability Workshop Final Report (01.10.2008)
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Conference Proceeding
Manufacturability and Speed Performance Demonstration of Porous ULK (k=2.5) for a 45nm CMOS Platform
Richard, E., Mellier, M., Petitdidier, S., Delsol, R., Besling, W., Marinier, L., Imbert, G., Lagha, A., Broussous, L., Rasco, M., Cregut, C., Fox, R., Downey, S., Huang, G., Haond, M., Cave, N., Perera, A., Monget, C., Zaleski, M., Ferreira, P., Guvenilir, A., Brun, P., Ollier, E., Guillermet, M.
Published in 2007 IEEE Symposium on VLSI Technology (01.06.2007)
Published in 2007 IEEE Symposium on VLSI Technology (01.06.2007)
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Conference Proceeding
In situ post etching treatment as a solution to improve defect density for porous low-k integration using metallic hard masks
Posseme, N., Bouyssou, R., Chevolleau, T., David, T., Arnal, V., Chhun, S., Monget, C., Richard, E., Galpin, D., Guillan, J., Arnaud, L., Roy, D., Guillermet, M., Ramard, J., Joubert, O., Verove, C.
Published in 2009 IEEE International Interconnect Technology Conference (01.06.2009)
Published in 2009 IEEE International Interconnect Technology Conference (01.06.2009)
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Conference Proceeding
Reliability failure modes in interconnects for the 45 nm technology node and beyond
Arnaud, L., Galpin, D., Chhun, S., Monget, C., Richard, E., Roy, D., Besset, C., Vilmay, M., Doyen, L., Waltz, P., Petitprez, E., Terrier, F., Imbert, G., Le Friec, Y.
Published in 2009 IEEE International Interconnect Technology Conference (01.06.2009)
Published in 2009 IEEE International Interconnect Technology Conference (01.06.2009)
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Conference Proceeding
Key Process steps for high reliable SiOCH low-k dielectrics for the sub 45nm technology nodes
Vilmay, M., Roy, D., Besset, C., Galpin, D., Monget, C., Vannier, P., Le Friec, Y., Imbert, G., Mellier, M., Petitdidier, S., Robin, O., Guillan, J., Chhun, S., Arnaud, L., Volpi, F., Chaix, J.-M.
Published in 2009 IEEE International Interconnect Technology Conference (01.06.2009)
Published in 2009 IEEE International Interconnect Technology Conference (01.06.2009)
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Conference Proceeding
A Cost-Effective Low Power Platform for the 45-nm Technology Node
Josse, E., Parihar, S., Callen, O., Ferreira, P., Monget, C., Farcy, A., Zaleski, M., Villanueva, D., Ranica, R., Bidaud, M., Barge, D., Laviron, C., Auriac, N., Le Cam, C., Harrison, S., Warrick, S., Leverd, F., Gouraud, P., Zoll, S., Guyader, F., Perrin, E., Baylac, E., Belledent, J., Icard, B., Minghetti, B., Manakli, S., Pain, L., Huard, V., Ribes, G., Rochereau, K., Bordez, S., Blanc, C., Margain, A., Delille, D., Pantel, R., Barla, K., Cave, N., Haond, M.
Published in 2006 International Electron Devices Meeting (01.12.2006)
Published in 2006 International Electron Devices Meeting (01.12.2006)
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