ESTA: An Efficient Method for Reliability Enhancement of RT-Level Designs
Naghmeh Karimi, Shahrzad Mirkhani, Zainalabedin Navabi
Published in 2006 15th Asian Test Symposium (01.11.2006)
Published in 2006 15th Asian Test Symposium (01.11.2006)
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Conference Proceeding
Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience)
Cheng, Eric, Mirkhani, Shahrzad, Szafaryn, Lukasz G., Chen-Yong Cher, Hyungmin Cho, Skadron, Kevin, Stan, Mircea R., Lilja, Klas, Abraham, Jacob A., Bose, Pradip, Mitra, Subhasish
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.09.2018)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.09.2018)
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Journal Article
In-depth soft error vulnerability analysis using synthetic benchmarks
Mirkhani, Shahrzad, Samynathan, Balavinayagam, Abraham, Jacob A.
Published in 2015 IEEE 33rd VLSI Test Symposium (VTS) (01.04.2015)
Published in 2015 IEEE 33rd VLSI Test Symposium (VTS) (01.04.2015)
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Conference Proceeding
Quantitative evaluation of soft error injection techniques for robust system design
Cho, Hyungmin, Mirkhani, Shahrzad, Cher, Chen-Yong, Abraham, Jacob A., Mitra, Subhasish
Published in 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) (29.05.2013)
Published in 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) (29.05.2013)
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Conference Proceeding
Efficient soft error vulnerability estimation of complex designs
Mirkhani, Shahrzad, Mitra, Subhasish, Chen-Yong Cher, Abraham, Jacob
Published in 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2015)
Published in 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2015)
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Conference Proceeding
CLEAR: Cross-layer exploration for architecting resilience: Combining hardware and software techniques to tolerate soft errors in processor cores
Cheng, Eric, Mirkhani, Shahrzad, Szafaryn, Lukasz G., Chen-Yong Cher, Hyungmin Cho, Skadron, Kevin, Stan, Mircea R., Lilja, Klas, Abraham, Jacob A., Bose, Pradip, Mitra, Subhasish
Published in 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC) (01.06.2016)
Published in 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC) (01.06.2016)
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Conference Proceeding
Fast evaluation of test vector sets using a simulation-based statistical metric
Mirkhani, Shahrzad, Abraham, Jacob A.
Published in 2014 IEEE 32nd VLSI Test Symposium (VTS) (01.04.2014)
Published in 2014 IEEE 32nd VLSI Test Symposium (VTS) (01.04.2014)
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Conference Proceeding
Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights
Cheng, Eric, Abraham, Jacob, Bose, Pradip, Buyuktosunoglu, Alper, Campbell, Keith, Deming Chen, Cher, Cheng-Yong, Hyungmin Cho, Binh Le, Lilja, Klas, Mirkhani, Shahrzad, Skadron, Kevin, Stan, Mircea, Szafaryn, Lukasz, Vezyrtzis, Christos, Mitra, Subhasish
Published in 2017 IEEE International Conference on Computer Design (ICCD) (01.11.2017)
Published in 2017 IEEE International Conference on Computer Design (ICCD) (01.11.2017)
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Conference Proceeding
FALCON: Rapid statistical fault coverage estimation for complex designs
Mirkhani, S., Abraham, J. A., Toai Vo, Hongshin Jun, Eklow, B.
Published in 2012 IEEE International Test Conference (01.11.2012)
Published in 2012 IEEE International Test Conference (01.11.2012)
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Conference Proceeding
Rethinking error injection for effective resilience
Mirkhani, Shahrzad, Hyungmin Cho, Mitra, Subhasish, Abraham, Jacob A.
Published in 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) (01.01.2014)
Published in 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) (01.01.2014)
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Conference Proceeding
Enhancing Fault Simulation Performance by Dynamic Fault Clustering
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Conference Proceeding
SYSTEMS AND METHODS FOR ACCELERATING DATA OPERATIONS BY UTILIZING DATAFLOW SUBGRAPH TEMPLATES
Chapman, Keith, Robatmili, Behnam, Samynathan, Balavinayagam, Mirkhani, Shahrzad, Lavasani, Maysam, Chen, Weiwei, Tavana, Danesh, Davis, John David, Nik, Mehdi
Year of Publication 24.09.2020
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Year of Publication 24.09.2020
Patent
Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience)
Cheng, Eric, Mirkhani, Shahrzad, Szafaryn, Lukasz G, Chen-Yong, Cher, Cho, Hyungmin, Skadron, Kevin, Stan, Mircea R, Lilja, Klas, Abraham, Jacob A, Bose, Pradip, Mitra, Subhasish
Published in arXiv.org (28.09.2017)
Published in arXiv.org (28.09.2017)
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Paper
Journal Article
CLEAR: Cross-Layer Exploration for Architecting Resilience - Combining Hardware and Software Techniques to Tolerate Soft Errors in Processor Cores
Cheng, Eric, Mirkhani, Shahrzad, Szafaryn, Lukasz G, Chen-Yong, Cher, Cho, Hyungmin, Skadron, Kevin, Stan, Mircea R, Lilja, Klas, Abraham, Jacob A, Bose, Pradip, Mitra, Subhasish
Published in arXiv.org (23.06.2016)
Published in arXiv.org (23.06.2016)
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Paper
Journal Article
Fault simulation for VHDL based test bench and BIST evaluation
Farshbaf, H., Zolfy, M., Mirkhani, S., Navabi, Z.
Published in Proceedings - Asian Test Symposium (2001)
Published in Proceedings - Asian Test Symposium (2001)
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Conference Proceeding
Journal Article
CLEAR Cross-Layer Resilience: A Retrospective
Cheng, Eric, Cho, Hyungmin, Mirkhani, Shahrzad, Szafaryn, Lukasz, Abraham, Jacob, Bose, Pradip, Cher, Chen-Yong, Lilja, Klas, Skadron, Kevin, Stan, Mircea, Mitra, Subhasish
Published in IEEE design and test (17.10.2024)
Published in IEEE design and test (17.10.2024)
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Magazine Article