Search Results - "Melde Thomas" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Design and Analysis of an Ultra-Dense, Low-Leakage, and Fast FeFET-Based Random Access Memory Array

Design and Analysis of an Ultra-Dense, Low-Leakage, and Fast FeFET-Based Random Access Memory Array

by Reis, Dayane, Datta, Suman, Niemier, Michael T., Hu, Xiaobo Sharon, Ni, Kai, Chakraborty, Wriddhi, Yin, Xunzhao, Trentzsch, Martin, Dunkel, Stefan, Melde, Thomas, Muller, Johannes, Beyer, Sven
Published in IEEE journal on exploratory solid-state computational devices and circuits (01.12.2019)

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Journal Article

Compact FeFET Circuit Building Blocks for Fast and Efficient Nonvolatile Logic-in-Memory

Compact FeFET Circuit Building Blocks for Fast and Efficient Nonvolatile Logic-in-Memory

by Breyer, Evelyn T., Mulaosmanovic, Halid, Trommer, Jens, Melde, Thomas, Dunkel, Stefan, Trentzsch, Martin, Beyer, Sven, Slesazeck, Stefan, Mikolajick, Thomas
Published in IEEE journal of the Electron Devices Society (2020)

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Journal Article

$TaN and \hbox\hbox Sidewall Gate-Etch Damage Influence on Program, Erase, and Retention of Sub-50-nm TANOS nand Flash Memory Cells$

TaN and \hbox\hbox Sidewall Gate-Etch Damage Influence on Program, Erase, and Retention of Sub-50-nm TANOS nand Flash Memory Cells

by Beug, M F, Melde, T, Paul, J, Knoefler, R
Published in IEEE transactions on electron devices (01.06.2011)

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Journal Article

Impact of layer thickness on the ferroelectric behaviour of silicon doped hafnium oxide thin films

Impact of layer thickness on the ferroelectric behaviour of silicon doped hafnium oxide thin films

by Yurchuk, Ekaterina, Müller, Johannes, Knebel, Steve, Sundqvist, Jonas, Graham, Andrew P., Melde, Thomas, Schröder, Uwe, Mikolajick, Thomas
Published in Thin solid films (30.04.2013)

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Journal Article Conference Proceeding

Experimental fabrication of an ESF3 floating gate flash cell in an FD-SOI process

Experimental fabrication of an ESF3 floating gate flash cell in an FD-SOI process

by Mika, Nicki, Melde, Thomas, Dunkel, Stefan, Otto, Michael, Weisbuch, Francois, Krottenthaler, Peter, Mikolajick, Thomas
Published in ESSDERC 2022 - IEEE 52nd European Solid-State Device Research Conference (ESSDERC) (19.09.2022)

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Conference Proceeding

Ultra-dense co-integration of FeFETs and CMOS logic enabling very-fine grained Logic-in-Memory

Ultra-dense co-integration of FeFETs and CMOS logic enabling very-fine grained Logic-in-Memory

by Breyer, Evelyn T., Mulaosmanovic, Halid, Trommer, Jens, Melde, Thomas, Dunkel, Stefan, Trentzsch, Martin, Beyer, Sven, Mikolajick, Thomas, Slesazeck, Stefan
Published in ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC) (01.09.2019)

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Conference Proceeding

TaN and [Formula Omitted] Sidewall Gate-Etch Damage Influence on Program, Erase, and Retention of Sub-50-nm TANOS nand Flash Memory Cells

TaN and [Formula Omitted] Sidewall Gate-Etch Damage Influence on Program, Erase, and Retention of Sub-50-nm TANOS nand Flash Memory Cells

by Beug, M. Florian, Melde, Thomas, Paul, Jan, Knoefler, Roman
Published in IEEE transactions on electron devices (01.06.2011)

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Journal Article

TaN and hbox Al 2 hbox O 3 Sidewall Gate-Etch Damage Influence on Program, Erase, and Retention of Sub-50-nm TANOS nand Flash Memory Cells

TaN and hbox Al 2 hbox O 3 Sidewall Gate-Etch Damage Influence on Program, Erase, and Retention of Sub-50-nm TANOS nand Flash Memory Cells

by Beug, MFlorian, Melde, Thomas, Paul, Jan, Knoefler, Roman
Published in IEEE transactions on electron devices (01.06.2011)

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Journal Article

Floating gate memory cell and memory array structure

Floating gate memory cell and memory array structure

by Melde, Thomas
Year of Publication 07.03.2023

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Patent

Soziologie der Nachhaltigkeit

Soziologie der Nachhaltigkeit

Year of Publication 2021

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eBook

TaN and Al2O3 Sidewall Gate-Etch Damage Influence on Program, Erase, and Retention of Sub-50-nm TANOS NAND Flash Memory Cells

TaN and Al2O3 Sidewall Gate-Etch Damage Influence on Program, Erase, and Retention of Sub-50-nm TANOS NAND Flash Memory Cells

by FLORIAN BEUG, M, MELDE, Thomas, PAUL, Jan, KNOEFLER, Roman
Published in IEEE transactions on electron devices (01.06.2011)

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Journal Article

FLOATING GATE MEMORY CELL AND MEMORY ARRAY STRUCTURE

FLOATING GATE MEMORY CELL AND MEMORY ARRAY STRUCTURE

by Melde, Thomas
Year of Publication 15.07.2021

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Patent

Analysis of TANOS Memory Cells With Sealing Oxide Containing Blocking Dielectric

Analysis of TANOS Memory Cells With Sealing Oxide Containing Blocking Dielectric

by Florian Beug, M, Melde, Thomas, Czernohorsky, Malte, Hoffmann, Raik, Paul, Jan, Knoefler, Roman, Tilke, Armin T
Published in IEEE transactions on electron devices (01.07.2010)

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Journal Article

Soziologie der Nachhaltigkeit (Edition 1)

Soziologie der Nachhaltigkeit (Edition 1)

Year of Publication 11.03.2021

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eBook

Soziologie der Nachhaltigkeit

Soziologie der Nachhaltigkeit

Year of Publication 2021

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eBook

SEMICONDUCTOR DEVICE INCLUDING GATE WITH DIFFERENT LATERALLY ADJACENT SECTIONS AND METHOD

SEMICONDUCTOR DEVICE INCLUDING GATE WITH DIFFERENT LATERALLY ADJACENT SECTIONS AND METHOD

by Dünkel, Stefan, Richter, Ralf, Melde, Thomas
Year of Publication 03.10.2024

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Patent

SEMICONDUCTOR DEVICE INCLUDING GATE WITH DIFFERENT LATERALLY ADJACENT SECTIONS AND METHOD

SEMICONDUCTOR DEVICE INCLUDING GATE WITH DIFFERENT LATERALLY ADJACENT SECTIONS AND METHOD

by Dünkel, Stefan, Richter, Ralf, Melde, Thomas
Year of Publication 02.10.2024

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Patent

SOI MEMORY DEVICE

SOI MEMORY DEVICE

by Melde Thomas
Year of Publication 30.11.2017

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Patent

Non-volatile memory structure using semiconductor layer as floating gate and bulk semiconductor substrate as channel region

Non-volatile memory structure using semiconductor layer as floating gate and bulk semiconductor substrate as channel region

by Dünkel, Stefan, Richter, Ralf, Melde, Thomas
Year of Publication 18.04.2023

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Patent

NON-VOLATILE MEMORY STRUCTURE USING SEMICONDUCTOR LAYER AS FLOATING GATE AND BULK SEMICONDUCTOR SUBSTRATE AS CHANNEL REGION

NON-VOLATILE MEMORY STRUCTURE USING SEMICONDUCTOR LAYER AS FLOATING GATE AND BULK SEMICONDUCTOR SUBSTRATE AS CHANNEL REGION

by Dünkel, Stefan, Richter, Ralf, Melde, Thomas
Year of Publication 14.07.2022

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Patent