Quantum Transport Simulation of Experimentally Fabricated Nano-FinFET
Khan, H.R., Mamaluy, D., Vasileska, D.
Published in IEEE transactions on electron devices (01.04.2007)
Published in IEEE transactions on electron devices (01.04.2007)
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Journal Article
Simulation of the Impact of Process Variation on the Optimized 10-nm FinFET
Khan, H.R., Mamaluy, D., Vasileska, D.
Published in IEEE transactions on electron devices (01.08.2008)
Published in IEEE transactions on electron devices (01.08.2008)
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Journal Article
Fully 3D self-consistent quantum transport simulation of Double-gate and Tri-gate 10 nm FinFETs
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Journal Article
Conference Proceeding
Prediction of a realistic quantum logic gate using the contact block reduction method
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Journal Article
Conference Proceeding
Can silicon FinFETs satisfy ITRS projections for high performance 10 nm devices?
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Journal Article
Conference Proceeding
Quantum enhanced Josephson junction field-effect transistors for logic applications
Pan, W., Muhowski, A.J., Martinez, W.M., Sovinec, C.L.H., Mendez, J.P., Mamaluy, D., Yu, W., Shi, X., Sapkota, K., Hawkins, S.D., Klem, J.F.
Published in Materials science & engineering. B, Solid-state materials for advanced technology (01.12.2024)
Published in Materials science & engineering. B, Solid-state materials for advanced technology (01.12.2024)
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Journal Article
Efficient Computational Method for Ballistic Currents and Application to Single Quantum Dots
Sabathil, M., Birner, S., Mamaluy, D., Vogl, P.
Published in Journal of computational electronics (01.12.2003)
Published in Journal of computational electronics (01.12.2003)
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Journal Article
Three-Dimensional Fully-Coupled Electrical and Thermal Transport Model of Dynamic Switching in Oxide Memristors
Gao, Xujiao, Mamaluy, Denis, Mickel, Patrick R, Marinella, Matthew
Published in ECS transactions (08.09.2015)
Published in ECS transactions (08.09.2015)
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Journal Article
(Invited) Comprehensive Assessment of Oxide Memristors As Post-CMOS Memory and Logic Devices
Gao, Xujiao, Mamaluy, Denis, Cyr, Eric C., Marinella, Matthew J.
Published in ECS transactions (25.04.2016)
Published in ECS transactions (25.04.2016)
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Journal Article
Epitaxial aluminum layer on antimonide heterostructures for exploring Josephson junction effects
Pan, W, Sapkota, K. R, Lu, P, Muhowski, A. J, Martinez, W. M, Sovinec, C. L. H, Reyna, R, Mendez, J. P, Mamaluy, D, Hawkins, S. D, Klem, J. F, Smith, L. S. L, Temple, D. A, Enderson, Z, Jiang, Z, Rossi, E
Year of Publication 08.10.2024
Year of Publication 08.10.2024
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Journal Article
Quantum Enhanced Josephson Junction Field-Effect Transistors for Logic Applications
Pan, W, Muhowski, A J, Martinez, W M, Sovinec, C L H, Mendez, J P, Mamaluy, D, W Yu, Shi, X, Sapkota, K, Hawkins, S D, Klem, J F
Published in arXiv.org (27.09.2024)
Published in arXiv.org (27.09.2024)
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Paper
Journal Article
Contact block reduction method and its application to a 10 nm MOSFET device
Mamaluy, Denis, Mannargudi, Anand, Vasileska, Dragica, Sabathil, Matthias, Vogl, Peter
Published in Semiconductor science and technology (01.04.2004)
Published in Semiconductor science and technology (01.04.2004)
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Journal Article
Conference Proceeding
How much time does FET scaling have left?
Mamaluy, D., Gao, X., Tierney, B.
Published in 2014 International Workshop on Computational Electronics (IWCE) (01.06.2014)
Published in 2014 International Workshop on Computational Electronics (IWCE) (01.06.2014)
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Conference Proceeding