Process variations aware robust on-chip bus architecture synthesis for MPSoCs
Pandey, Sujan, Drechsler, Rolf, Murgan, Tudor, Glesner, Manfred
Published in 2008 IEEE International Symposium on Circuits and Systems (01.01.2008)
Published in 2008 IEEE International Symposium on Circuits and Systems (01.01.2008)
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Journal Article
Communication terminal and method for performing a cell search
Murgan, Tudor, Canonici, Jean-Xavier, Stefan-Vetten, Sonja, Huertgen, Frank, Dawid, Herbert, Clevorn, Thorsten, Salim, Umer, Ascheuer, Peter, Kerroum, Almansor
Year of Publication 07.05.2019
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Year of Publication 07.05.2019
Patent
A linear model for high-level delay estimation in VDSM on-chip interconnects
Murgan, T., Ortiz, A.G., Petrov, M., Glesner, M.
Published in 2005 IEEE International Symposium on Circuits and Systems (ISCAS) (2005)
Published in 2005 IEEE International Symposium on Circuits and Systems (ISCAS) (2005)
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COMMUNICATION TERMINAL AND METHOD FOR PERFORMING A CELL SEARCH
DAWID Herbert, ASCHEUER Peter, CANONICI Jean-Xavier, KERROUM Almansor, STEFAN-VETTEN Sonja, SALIM Umer, MURGAN Tudor, HUERTGEN Frank, CLEVORN Thorsten
Year of Publication 22.06.2017
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Year of Publication 22.06.2017
Patent
Method for searching for a radio cell and mobile terminal
CANONICI JEAN-XAVIER, MURGAN TUDOR, GUNZELMANN BERTRAM, DREWES CHRISTIAN, WU KAI, HERZINGER STEFAN
Year of Publication 18.08.2015
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Year of Publication 18.08.2015
Patent
METHOD FOR SEARCHING FOR A RADIO CELL AND MOBILE TERMINAL
CANONICI JEAN-XAVIER, MURGAN TUDOR, GUNZELMANN BERTRAM, DREWES CHRISTIAN, WU KAI, HERZINGER STEFAN
Year of Publication 06.02.2014
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Year of Publication 06.02.2014
Patent
Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus Synthesis
Pandey, S., Murgan, T., Glesner, M.
Published in 2006 IFIP International Conference on Very Large Scale Integration (01.10.2006)
Published in 2006 IFIP International Conference on Very Large Scale Integration (01.10.2006)
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