Search Results - "MORRIS, BERNARD, L" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

VOLTAGE LEVEL TRANSLATOR CIRCUIT

VOLTAGE LEVEL TRANSLATOR CIRCUIT

by BHATTACHARYA DIPANKAR, KRIZ JOHN C, MORRIS BERNARD L, KOTHANDARAMAN MAKESHWAR, NAGY JEFFREY J, NICHOLAS PETER J
Year of Publication 02.11.2011

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Patent

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

by BHATTACHARYA DIPANKAR, KRIZ JOHN C, MORRIS BERNARD L, KOTHANDARAMAN MAKESHWAR, SMOOHA YEHUDA
Year of Publication 27.07.2010

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Patent

OUTPUT BUFFER

OUTPUT BUFFER

by MORRIS BERNARD L
Year of Publication 18.10.1991

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Patent

INTEGRATED CIRCUIT COMPRISING SIGNAL SKEW ADJUSTMENT CELL SELECTED FROM CELL LIBRARY

INTEGRATED CIRCUIT COMPRISING SIGNAL SKEW ADJUSTMENT CELL SELECTED FROM CELL LIBRARY

by MORRIS BERNARD L, GASPER MARTIN J JR
Year of Publication 06.12.2012

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Patent

Integrated circuit with signal skew adjusting cell selected from cell library

Integrated circuit with signal skew adjusting cell selected from cell library

by Gasper, Jr, Martin J, Morris, Bernard L
Year of Publication 15.09.2009

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Patent

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

by JOHN C KRIZ, BERNARD L MORRIS, YEHUDA SMOOHA, MAKESHWAR KOTHANDARAMAN, DIPANKAR BHATTACHARYA
Year of Publication 28.11.2013

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Patent

Voltage level translator circuit

Voltage level translator circuit

by BHATTACHARYA DIPANKAR, KRIZ JOHN C, MORRIS BERNARD L, KOTHANDARAMAN MAKESHWAR, NAGY JEFFREY J, NICHOLAS PETER J
Year of Publication 17.09.2013

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Patent

Fail safe buffer capable of operating with a mixed voltage core

Fail safe buffer capable of operating with a mixed voltage core

by MORRIS BERNARD L
Year of Publication 06.02.2001

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Patent

The effects of phosphorus diffusion cooling rate on I 2L gain

The effects of phosphorus diffusion cooling rate on I 2L gain

by Morris, Bernard L.
Published in Solid-state electronics (1980)

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Journal Article

High-voltage tolerant input buffer in low-voltage technology

High-voltage tolerant input buffer in low-voltage technology

by MORRIS; BERNARD L
Year of Publication 14.09.1999

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Patent

Differential comparator with fixed and controllable hysteresis

Differential comparator with fixed and controllable hysteresis

by MORRIS; BERNARD L
Year of Publication 13.04.1999

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Patent

High-voltage tolerant input buffer in low-voltage technology

High-voltage tolerant input buffer in low-voltage technology

by BERNARD L. MORRIS
Year of Publication 21.10.1998

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Patent

LOW VOLTAGE INTEGRATED CIRCUIT AND ITS MANUFACTURE

LOW VOLTAGE INTEGRATED CIRCUIT AND ITS MANUFACTURE

by MORRIS BERNARD L
Year of Publication 09.10.1998

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Patent

Integrated circuit with signal skew adjusting cell selected from cell library

Integrated circuit with signal skew adjusting cell selected from cell library

by GASPER, JR. MARTIN J, MORRIS BERNARD L
Year of Publication 15.09.2009

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Patent

Electrostatic discharge protection circuit

Electrostatic discharge protection circuit

by Bhattacharya, Dipankar, Kothandaraman, Makeshwar, Kriz, John C, Morris, Bernard L, Smooha, Yehuda
Year of Publication 03.01.2012

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Patent

Electrostatic discharge protection circuit

Electrostatic discharge protection circuit

by BHATTACHARYA DIPANKAR, KRIZ JOHN C, MORRIS BERNARD L, KOTHANDARAMAN MAKESHWAR, SMOOHA YEHUDA
Year of Publication 03.01.2012

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Patent

Integrated circuit with signal skew adjusting cell selected from cell library

Integrated circuit with signal skew adjusting cell selected from cell library

by GASPER MARTIN J.JR, MORRIS BERNARD L
Year of Publication 02.03.2006

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Patent

VOLTAGE LEVEL TRANSLATOR CIRCUIT

VOLTAGE LEVEL TRANSLATOR CIRCUIT

by BHATTACHARYA, DIPANKAR, MORRIS, BERNARD, L, KOTHANDARAMAN, MAKESHWAR, KRIZ, JOHN, C, NICHOLAS, PETER, J, NAGY, JEFFREY, J
Year of Publication 02.11.2011

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Patent

Electrostatic discharge protection in a semiconductor device

Electrostatic discharge protection in a semiconductor device

by Bhattacharya, Dipankar, Kriz, John C, Morris, Bernard L, Smooha, Yehuda
Year of Publication 24.02.2009

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Patent

Electrostatic discharge protection in a semiconductor device

Electrostatic discharge protection in a semiconductor device

by BHATTACHARYA DIPANKAR, KRIZ JOHN C, MORRIS BERNARD L, SMOOHA YEHUDA
Year of Publication 24.02.2009

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Patent

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