Logic Block Level Design-Technology Co-Optimization is the New Moore's Law (Invited)
Moroz, Victor, Lin, Xi-Wei, Dam, Thuc
Published in 2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) (01.04.2020)
Published in 2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) (01.04.2020)
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Conference Proceeding
Transistor design for 5nm and beyond: Slowing down electrons to speed up transistors
Moroz, Victor, Huang, Joanne, Arghavani, Reza
Published in 2016 17th International Symposium on Quality Electronic Design (ISQED) (01.03.2016)
Published in 2016 17th International Symposium on Quality Electronic Design (ISQED) (01.03.2016)
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Conference Proceeding