Physical Attack Protection Techniques for IC Chip Level Hardware Security
Nagata, Makoto, Miki, Takuji, Miura, Noriyuki
Published in IEEE transactions on very large scale integration (VLSI) systems (01.01.2022)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.01.2022)
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Journal Article
Si-Backside Protection Circuits Against Physical Security Attacks on Flip-Chip Devices
Miki, Takuji, Nagata, Makoto, Sonoda, Hiroki, Miura, Noriyuki, Okidono, Takaaki, Araga, Yuuki, Watanabe, Naoya, Shimamoto, Haruo, Kikuchi, Katsuya
Published in IEEE journal of solid-state circuits (01.10.2020)
Published in IEEE journal of solid-state circuits (01.10.2020)
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Journal Article
High Throughput/Gate AES Hardware Architectures Based on Datapath Compression
Ueno, Rei, Homma, Naofumi, Morioka, Sumio, Miura, Noriyuki, Matsuda, Kohei, Nagata, Makoto, Bhasin, Shivam, Mathieu, Yves, Graba, Tarik, Danger, Jean-Luc
Published in IEEE transactions on computers (01.04.2020)
Published in IEEE transactions on computers (01.04.2020)
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Journal Article
Design and concept proof of an inductive impulse self-destructor in sense-and-react countermeasure against physical attacks
Tada, Sho, Yamashita, Yuki, Matsuda, Kohei, Nagata, Makoto, Sakiyama, Kazuo, Miura, Noriyuki
Published in Japanese Journal of Applied Physics (01.05.2021)
Published in Japanese Journal of Applied Physics (01.05.2021)
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Journal Article
An IC-level countermeasure against laser fault injection attack by information leakage sensing based on laser-induced opto-electric bulk current density
Matsuda, Kohei, Tada, Sho, Nagata, Makoto, Komano, Yuichi, Li, Yang, Sugawara, Takeshi, Iwamoto, Mitsugu, Ohta, Kazuo, Sakiyama, Kazuo, Miura, Noriyuki
Published in Japanese Journal of Applied Physics (01.04.2020)
Published in Japanese Journal of Applied Physics (01.04.2020)
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Journal Article
Flush Code Eraser: Fast Attack Response Invalidating Cryptographic Sensitive Data
Sakiyama, Kazuo, Fujii, Tatsuya, Matsuda, Kohei, Miura, Noriyuki
Published in IEEE embedded systems letters (01.06.2020)
Published in IEEE embedded systems letters (01.06.2020)
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Journal Article
Measurement and Analysis of Power Noise Characteristics for EMI Awareness of Power Delivery Networks in 3-D Through-Silicon Via Integration
Araga, Yuuki, Nagata, Makoto, Miura, Noriyuki, Ikeda, Hiroaki, Kikuchi, Katsuya
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01.02.2018)
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01.02.2018)
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Journal Article
A 0.15-mm-Thick Noncontact Connector for MIPI Using a Vertical Directional Coupler
Kosuge, Atsutake, Mizuhara, Wataru, Shidei, Tsunaaki, Takeya, Tsutomu, Miura, Noriyuki, Taguchi, Masao, Ishikuro, Hiroki, Kuroda, Tadahiro
Published in IEEE journal of solid-state circuits (01.01.2014)
Published in IEEE journal of solid-state circuits (01.01.2014)
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Journal Article
47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking
Saito, Mitsuko, Yoshida, Yoichi, Miura, Noriyuki, Ishikuro, Hiroki, Kuroda, Tadahiro
Published in IEEE transactions on circuits and systems. I, Regular papers (01.09.2010)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.09.2010)
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Journal Article
Proactive and reactive protection circuit techniques against EM leakage and injection
Miura, Noriyuki, Fujimoto, Daisuke, Nagata, Makoto
Published in 2015 IEEE International Symposium on Electromagnetic Compatibility (EMC) (01.08.2015)
Published in 2015 IEEE International Symposium on Electromagnetic Compatibility (EMC) (01.08.2015)
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Conference Proceeding
Journal Article
15.8 A permanent digital archive system based on 4F2 x-point multi-layer metal nano-dot structure
Miura, Noriyuki, Shijia Liu, Watanabe, Tsuyoshi, Imai, Shigeki, Nagata, Makoto
Published in 2017 IEEE International Solid-State Circuits Conference (ISSCC) (01.02.2017)
Published in 2017 IEEE International Solid-State Circuits Conference (ISSCC) (01.02.2017)
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Conference Proceeding
EMI performance of power delivery networks in 3D TSV integration
Araga, Yuuki, Nagata, Makoto, Miura, Noriyuki, Ikeda, Hiroaki, Kikuchi, Katsuya
Published in 2016 International Symposium on Electromagnetic Compatibility - EMC EUROPE (01.09.2016)
Published in 2016 International Symposium on Electromagnetic Compatibility - EMC EUROPE (01.09.2016)
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Conference Proceeding
Emulation of high-frequency substrate noise generation in CMOS digital circuits
Shimazaki, Shunsuke, Taga, Shota, Makita, Tetsuya, Azuma, Naoya, Miura, Noriyuki, Nagata, Makoto
Published in Japanese Journal of Applied Physics (01.04.2014)
Published in Japanese Journal of Applied Physics (01.04.2014)
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Journal Article
Asynchronous Pulse Transmitter for Power Reduction in Inductive-Coupling Link
Saito, Mitsuko, Miura, Noriyuki, Kuroda, Tadahiro
Published in Japanese Journal of Applied Physics (01.02.2012)
Published in Japanese Journal of Applied Physics (01.02.2012)
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Journal Article
A 65fJ/b Inter-Chip Inductive-Coupling Data Transceivers Using Charge-Recycling Technique for Low-Power Inter-Chip Communication in 3-D System Integration
Niitsu, K., Kawai, S., Miura, N., Ishikuro, H., Kuroda, T.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.07.2012)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.07.2012)
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Journal Article