Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module
Warnock, James, Yuen Chan, Harrer, Hubert, Carey, Sean, Salem, Gerard, Malone, Doug, Puri, Ruchir, Zitz, Jeffrey A., Jatkowski, Adam, Strevig, Gerald, Datta, Ayan, Gattiker, Anne, Bansal, Aditya, Mayer, Guenter, Yiu-Hing Chan, Mayo, Mark, Rude, David L., Sigal, Leon, Strach, Thomas, Smith, Howard H., Huajun Wen, Pak-kin Mak, Shum, C-L Kevin, Plass, Donald, Webb, Charles
Published in IEEE journal of solid-state circuits (01.01.2014)
Published in IEEE journal of solid-state circuits (01.01.2014)
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Journal Article
4.1 22nm Next-generation IBM System z microprocessor
Warnock, James, Curran, Brian, Badar, John, Fredeman, Gregory, Plass, Donald, Yuen Chan, Carey, Sean, Salem, Gerard, Schroeder, Friedrich, Malgioglio, Frank, Mayer, Guenter, Berry, Christopher, Wood, Michael, Yiu-Hing Chan, Mayo, Mark, Isakson, John, Nagarajan, Charudhattan, Werner, Tobias, Sigal, Leon, Nigaglioni, Ricardo, Cichanowski, Mark, Zitz, Jeffrey, Ziegler, Matthew, Bronson, Tim, Strevig, Gerald, Dreps, Daniel, Puri, Ruchir, Malone, Douglas, Wendel, Dieter, Pak-Kin Mak, Blake, Michael
Published in 2015 IEEE International Solid State Circuits Conference (ISSCC) (01.02.2015)
Published in 2015 IEEE International Solid State Circuits Conference (ISSCC) (01.02.2015)
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Conference Proceeding
Journal Article
The zEnterprise 196 System and Microprocessor
Curran, B W, Eisen, L E, Schwarz, E M, Mak, P, Warnock, J, Meaney, P J, Fee, M
Published in IEEE MICRO (01.03.2011)
Published in IEEE MICRO (01.03.2011)
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Journal Article
5.5GHz system z microprocessor and multi-chip module
Warnock, J., Chan, Y. H., Harrer, H., Rude, D., Puri, R., Carey, S., Salem, G., Mayer, G., Yiu-Hing Chan, Mayo, M., Jatkowski, A., Strevig, G., Sigal, L., Datta, A., Gattiker, A., Bansal, A., Malone, D., Strach, T., Huajun Wen, Pak-Kin Mak, Chung-Lung Shum, Plass, D., Webb, C.
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
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Conference Proceeding
Granting exclusive cache access using locality cache coherency state
Papazova, Vesselina K, Ulrich, Hanno, Bronson, Timothy C, Drapala, Garrett M, Mak, Pak-Kin
Year of Publication 25.02.2020
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Year of Publication 25.02.2020
Patent
Processor subsystem interconnect architecture for a large symmetric multiprocessing system
Mak, P, Strait, G E, Blake, M A, Kark, K W
Published in IBM journal of research and development (01.05.2004)
Published in IBM journal of research and development (01.05.2004)
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Journal Article
Preinstall of partial store cache lines
Klein, Matthias, Ambroladze, Ekaterina M, Junghans, Sascha, Mak, Pak-Kin, Sonnelitter, III, Robert J, Wilson, Chad G
Year of Publication 07.01.2020
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Year of Publication 07.01.2020
Patent
HOT CACHE LINE FAIRNESS ARBITRATION IN DISTRIBUTED MODULAR SMP SYSTEM
Blake, Michael A, Gott, Rebecca M, Papazova, Vesselina K, Mak, Pak-Kin
Year of Publication 11.10.2018
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Year of Publication 11.10.2018
Patent
HOT CACHE LINE ARBITRATION
Blake, Michael A, Papazova, Vesselina K, Bronson, Timothy C, Mak, Pak-Kin, Kohl, Jason D
Year of Publication 04.10.2018
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Year of Publication 04.10.2018
Patent
Target cache line arbitration within a processor cluster
Mak, Pak-kin, O'Neill, Jr., Arthur J, Hoste, Johnathon J, Berger, Deanna Postles Dunn, Sonnelitter, III, Robert J
Year of Publication 04.06.2019
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Year of Publication 04.06.2019
Patent
Non-disruptive clearing of varying address ranges from cache
Mak, Pak-kin, Blake, Michael A, Berger, Deanna P. D, Ambroladze, Ekaterina M, Tracy, Guy G, Sonnelitter, III, Robert J, Wilson, Chad G
Year of Publication 12.05.2020
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Year of Publication 12.05.2020
Patent
GRANTING EXCLUSIVE CACHE ACCESS USING LOCALITY CACHE COHERENCY STATE
Papazova Vesselina K, Ulrich Hanno, Bronson Timothy C, Mak Pak-Kin, Drapala Garrett M
Year of Publication 12.04.2018
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Year of Publication 12.04.2018
Patent