Search Results - "MAIZ JOSE" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Effect of passivation on stress relaxation in electroplated copper films

Effect of passivation on stress relaxation in electroplated copper films

by Gan, Dongwen, Ho, Paul S., Pang, Yaoyu, Huang, Rui, Leu, Jihperng, Maiz, Jose, Scherban, Tracey
Published in Journal of materials research (01.06.2006)

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Journal Article

Measurements and analysis of SER-tolerant latch in a 90-nm dual-V/T/ CMOS process

Measurements and analysis of SER-tolerant latch in a 90-nm dual-V/T/ CMOS process

by Hazucha, P, Karnik, T, Walstra, S, Bloechel, B A, Tschanz, J W, Maiz, J, Soumyanath, K, Dermer, G E, Narendra, S, De, V, Borkar, S
Published in IEEE journal of solid-state circuits (01.09.2004)

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Journal Article

HIGH DOSE RADIATION DETECTOR

HIGH DOSE RADIATION DETECTOR

by YANG XIAOFENG, GILL BALKARAN SINGH, MAIZ JOSE A, SEIFERT NORBERT R, KORNFELD AVNER
Year of Publication 28.08.2014

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Patent

Effect of BTI Degradation on Transistor Variability in Advanced Semiconductor Technologies

Effect of BTI Degradation on Transistor Variability in Advanced Semiconductor Technologies

by Sangwoo Pae, Maiz, J., Prasad, C., Woolery, B.
Published in IEEE transactions on device and materials reliability (01.09.2008)

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Magazine Article

Effects of Passivation Layer on Stress Relaxation and Mass Transport in Electroplated Cu Films

Effects of Passivation Layer on Stress Relaxation and Mass Transport in Electroplated Cu Films

by Gan, Dongwen, Ho, Paul S., Huang, Rui, Leu, Jihperng, Maiz, Jose, Scherban, Tracey
Published in AIP conference proceedings (08.12.2004)

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Journal Article

Measurements and analysis of SER-tolerant latch in a 90-nm Dual-VT CMOS process

Measurements and analysis of SER-tolerant latch in a 90-nm Dual-VT CMOS process

by HAZUCHA, Peter, KARNIK, Tanay, BORKAR, Shekhar, WALSTRA, Steven, BLOECHEL, Bradley A, TSCHANZ, James W, MAIZ, Jose, SOUMYANATH, Krishnamurthy, DERMER, Gregory E, NARENDRA, Siva, DE, Vivek
Published in IEEE journal of solid-state circuits (01.09.2004)

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Journal Article

Process charging and electrostatic damage protection in silicon-on-insulator technology

Process charging and electrostatic damage protection in silicon-on-insulator technology

by Pae, Sangwoo, Maiz, Jose
Year of Publication 13.07.2010

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Patent

Process charging and electrostatic damage protection in silicon-on-insulator technology

Process charging and electrostatic damage protection in silicon-on-insulator technology

by PAE SANGWOO, MAIZ JOSE
Year of Publication 13.07.2010

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Patent

SEMICONDUCTOR WAFER SINGULATION METHOD

SEMICONDUCTOR WAFER SINGULATION METHOD

by Maiz, Jose
Year of Publication 03.07.2003

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Patent

High dose radiation detector

High dose radiation detector

by Maiz Jose A, Yang Xiaofeng, Seifert Norbert R, Gill Balkaran Singh, Kornfeld Avner
Year of Publication 27.06.2017

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Patent

Process charging and electrostatic damage protection in silicon-on-insulator technology

Process charging and electrostatic damage protection in silicon-on-insulator technology

by PAE SANGWOO, MAIZ JOSE
Year of Publication 08.05.2008

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Patent

Methods to create dual-gate dielectrics in transistors using high-K dielectric

Methods to create dual-gate dielectrics in transistors using high-K dielectric

by PAE SANGWOO, MAIZ JOSE
Year of Publication 20.03.2008

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Patent

Vorrichtung und System mit Detektoren für hohe Strahlendosen

Vorrichtung und System mit Detektoren für hohe Strahlendosen

by Seifert, Norbert R, Gill, Balkaran, Kornfeld, Avner, Maiz, Jose A, Yang, Xiaofeng
Year of Publication 27.01.2022

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Patent

Repair bits for a low voltage cache

Repair bits for a low voltage cache

by Dempsey, Morgan J, Maiz, Jose A
Year of Publication 06.03.2012

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Patent

Repair bits for a low voltage cache

Repair bits for a low voltage cache

by MAIZ JOSE A, DEMPSEY MORGAN J
Year of Publication 06.03.2012

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Patent

Transdermal sensing of analytes in interstitial fluid and associated data transmission systems

Transdermal sensing of analytes in interstitial fluid and associated data transmission systems

by Olsson, Lennart, Maiz-Aguinaga, Jose Antonio
Year of Publication 08.12.2022

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Patent

Microelectronic die having CMOS ring oscillator thereon and method of using same

Microelectronic die having CMOS ring oscillator thereon and method of using same

by Leatherman, Gerald S, He, Jun, Maiz, Jose
Year of Publication 15.02.2011

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Patent

Methods of forming electromigration and thermal gradient based fuse structures

Methods of forming electromigration and thermal gradient based fuse structures

by BOHR MARK, MAIZ JOSE A, HE JUN
Year of Publication 05.02.2013

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Patent

Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects

Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects

by Morrow, Xiaorong, Leu, Jihperng, Kuhn, Markus, Maiz, Jose A
Year of Publication 30.10.2012

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Patent

Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects

Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects

by MORROW XIAORONG, MAIZ JOSE A, LEU JIHPERNG, KUHN MARKUS
Year of Publication 30.10.2012

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Patent

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