Innovative scheme for selective carbon nanotubes integration in via structures
Fayolle, M., Pontcharra, J., Dijon, J., Fournier, A., Okuno, H., Quesnel, E., Muffato, V., Jayet, C., Lugand, J.F., Gautier, P., Vandroux, L., Huet, S., Grampeix, H., Yckache, K., Mariolle, D., Billon, T.
Published in Microelectronic engineering (01.05.2011)
Published in Microelectronic engineering (01.05.2011)
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Conference Proceeding
Full CMP integration of CVD TiN damascene sub-0.1-μm metal gate devices for ULSI applications
Ducroquet, F., Achard, H., Coudert, F., Previtali, B., Lugand, J.-F., Ulmer, L., Farjot, T., Gobil, Y., Heitzmann, M., Tedesco, S., Nier, M.E., Deleonibus, S.
Published in IEEE transactions on electron devices (01.08.2001)
Published in IEEE transactions on electron devices (01.08.2001)
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Journal Article
Through Silicon Via technology using tungsten metallization
Pares, G, Bresson, N, Minoret, S, Lapras, V, Brianceau, P, Lugand, J F, Anciant, R, Sillon, N
Published in 2011 IEEE International Conference on IC Design & Technology (01.05.2011)
Published in 2011 IEEE International Conference on IC Design & Technology (01.05.2011)
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Conference Proceeding
Full CMP integration of CVD TiN damascene sub-0.1-[mu]m metal gate devices for ULSI applications
Ducroquet, F, Achard, H, Coudert, F, Previtali, B, Lugand, J.-F, Ulmer, L, Farjot, T, Gobil, Y, Heitzmann, M, Tedesco, S, Nier, M.E, Deleonibus, S
Published in IEEE transactions on electron devices (01.08.2001)
Published in IEEE transactions on electron devices (01.08.2001)
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Journal Article
Full CMP integration of CVD TiN damascene sub-0.1-/spl mu/m metal gate devices for ULSI applications
Ducroquet, F., Achard, H., Coudert, F., Previtali, B., Lugand, J.-F., Ulmer, L., Farjot, T., Gobil, Y., Heitzmann, M., Tedesco, S., Nier, M.E., Deleonibus, S.
Published in IEEE transactions on electron devices (01.08.2001)
Published in IEEE transactions on electron devices (01.08.2001)
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Journal Article
Full CMP integration of CVD TiN damascene sub-0.1-mum metal gate devices for ULSI applications
Ducroquet, F, Achard, H, Coudert, F, Previtali, B, Lugand, J-F, Ulmer, L, Farjot, T, Gobil, Y, Heitzmann, M, Tedesco, S, Nier, M E, Deleonibus, S
Published in IEEE transactions on electron devices (01.08.2001)
Published in IEEE transactions on electron devices (01.08.2001)
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Journal Article
Integration of dense CNTs in vias on 200mm diameter wafers: Study of post CNT growth processes
Fayolle, M., Lugand, J. F., Kachtouli, R., Okuno, H., Dijon, J., Gautier, P., Billon, T.
Published in 2011 IEEE International Interconnect Technology Conference (01.05.2011)
Published in 2011 IEEE International Interconnect Technology Conference (01.05.2011)
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Conference Proceeding
Mid-process through silicon vias technology using tungsten metallization: Process optimazation and electrical results
Pares, G., Minoret, S., Lugand, J.F., Huet, S., Lapras, V., Anciant, R., Henry, D., Sillon, N., Dunne, B.
Published in 2009 11th Electronics Packaging Technology Conference (01.12.2009)
Published in 2009 11th Electronics Packaging Technology Conference (01.12.2009)
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Conference Proceeding
Full CMP Integration of TiN Damascene Metal Gate Devices
Achard, H., Ducroquet, F., Coudert, F., Previtali, B., Lugand, J.F., Ulmer, L., Farjot, T., Gobil, Y., Heitzmann, M., Tedesco, S., Nier, M.E., Deleonibus, S.
Published in 30th European Solid-State Device Research Conference (2000)
Published in 30th European Solid-State Device Research Conference (2000)
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Conference Proceeding
Copper-SiOC-AirGap integration in a double level metal interconnect
Demolliens, O., Morand, Y., Fayolle, M., Cochet, M., Assous, M., Feldis, H., Lonis, D., Royer, J.C., Gobil, Y., Passemard, G., Maury, P., Jourdan, F., Cordeau, M., Morel, T., Perroud, L., Ulmer, L., Lugard, J.F., Renaud, D.
Published in Proceedings of the IEEE 2000 International Interconnect Technology Conference (Cat. No.00EX407) (2000)
Published in Proceedings of the IEEE 2000 International Interconnect Technology Conference (Cat. No.00EX407) (2000)
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Conference Proceeding