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"Low Yip Seng"
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"Low Yip Seng"
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SEMICONDUCTOR CHIP DEVICE WITH VENTED LID
by
LI JIANGUO
,
MCLELLAN NEIL
,
LOW YIP SENG
Year of Publication
03.10.2013
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22
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FACE-TO-FACE (F2F) HYBRID STRUCTURE FOR AN INTEGRATED CIRCUIT
by
TOPACIO, RODEN, R
,
MARTINEZ, LIANE
,
LOW
,
YIP
,
SENG
Year of Publication
02.10.2013
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SEMICONDUCTOR CHIP WITH STAIR ARRANGEMENT BUMP STRUCTURES
by
LOW
,
YIP SENG
,
TOPACIO, RODEN R
Year of Publication
17.03.2011
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24
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Semiconductor Chip with Stair Arrangement Bump Structures
by
TOPACIO RODEN R
,
LOW YIP SENG
Year of Publication
10.03.2011
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25
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HEATSINK INTERPOSER
by
LOW
,
YIP SENG
,
TOPACIO, RODEN R
,
MARTINEZ, LIANE
Year of Publication
20.06.2013
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HEATSINK INTERPOSER
by
TOPACIO RODEN R
,
MARTINEZ LIANE
,
LOW YIP SENG
Year of Publication
13.06.2013
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27
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Method of manufacturing substrates having asymmetric buildup layers
by
LEUNG ANDREW
,
TOPACIO RODEN R
,
MARTINEZ LIANE
,
LOW YIP SENG
Year of Publication
30.10.2012
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Method of manufacturing substrates having asymmetric buildup layers
by
Leung, Andrew
,
Topacio, Roden R
,
Martinez, Liane
,
Low
,
Yip Seng
Year of Publication
30.10.2012
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29
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CIRCUIT BOARD WITH VIA TRACE CONNECTION AND METHOD OF MAKING THE SAME
by
MCLELLAN, NEIL
,
LEUNG, ANDREW, KW
,
LOW
,
YIP
,
SENG
Year of Publication
24.10.2012
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A METHOD OF MANUFACTURING SUBSTRATES HAVING ASYMMETRIC BUILDUP LAYERS AND SUBSTRATES HAVING ASYMMETRIC BUILDUP LAYERS
by
LOW
,
YIP SENG
,
LEUNG, ANDREW
,
TOPACIO, RODEN
,
MARTINEZ, LIANE
Year of Publication
06.06.2012
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CIRCUIT BOARD WITH VIA TRACE CONNECTION AND METHOD OF MAKING THE SAME
by
LEUNG ANDREW KW
,
MCLELLAN NEIL
,
LOW YIP SENG
Year of Publication
17.05.2012
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32
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SOLDER MASK WITH ANCHOR STRUCTURES
by
KW LEUNG, ANDREW
,
HSIEH, YU-LING
,
TOPACIO, RODEN, R
,
LOW
,
YIP
,
SENG
Year of Publication
16.07.2014
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33
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Solder mask with anchor structures
by
TOPACIO RODEN R
,
HSIEH YU-LING
,
LEUNG ANDREW K W
,
LOW YIP SENG
Year of Publication
08.07.2014
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34
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FACE-TO-FACE (F2F) HYBRID STRUCTURE FOR AN INTEGRATED CIRCUIT
by
TOPACIO, RODEN, R
,
MARTINEZ, LIANE
,
LOW
,
YIP
,
SENG
Year of Publication
26.10.2011
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METHOD OF MANUFACTURING SUBSTRATES HAVING ASYMMETRIC BUILDUP LAYERS
by
LEUNG ANDREW
,
MARTINEZ LIANE
,
TOPACIO RODEN
,
LOW YIP SENG
Year of Publication
22.09.2011
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36
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Circuit Board with Via Trace Connection and Method of Making the Same
by
LEUNG ANDREW K.W
,
MCLELLAN NEIL
,
LOW YIP SENG
Year of Publication
23.06.2011
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CIRCUIT BOARD WITH VIA TRACE CONNECTION AND METHOD OF MAKING THE SAME
by
MCLELLAN, NEIL
,
LEUNG, ANDREW, KW
,
LOW
,
YIP
,
SENG
Year of Publication
23.06.2011
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38
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Circuit board component shim structure
by
HU SUMING
,
MARTINEZ LIANE
,
LOW YIP SENG
,
MCLELLAN NEIL R
Year of Publication
22.10.2013
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A METHOD OF MANUFACTURING SUBSTRATES HAVING ASYMMETRIC BUILDUP LAYERS
by
LOW
,
YIP SENG
,
LEUNG, ANDREW
,
TOPACIO, RODEN
,
MARTINEZ, LIANE
Year of Publication
03.02.2011
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METHOD OF MANUFACTURING SUBSTRATES HAVING ASYMMETRIC BUILDUP LAYERS
by
LEUNG ANDREW
,
MARTINEZ LIANE
,
TOPACIO RODEN
,
LOW YIP SENG
Year of Publication
03.02.2011
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