A 90-ns one-million erase/program cycle 1-Mbit flash memory
Niles Kynett, V., Fandrich, M.L., Anderson, J., Dix, P., Jungroth, O., Kreifels, J.A., Lodenquai, R.A., Vajdic, B., Wells, S., Winston, M.D., Yang, L.
Published in IEEE journal of solid-state circuits (01.10.1989)
Published in IEEE journal of solid-state circuits (01.10.1989)
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Journal Article
The design of a 55SPECint92 RISC processor under 2W
Yeung, N.K., Sutu, Y.-H., Su, T.Y.-F., Pak, E.T., Chao, C.-C., Akki, S., Yau, D.D., Lodenquai, R.
Published in Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94 (1994)
Published in Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94 (1994)
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Conference Proceeding
A 90 ns 100 K erase/program cycle megabit flash memory
Kynett, V., Anderson, J., Atwood, G., Dix, P., Fandrich, M., Jungroth, O., Kao, S., Kreifels, J.A., Lai, S., Liou, H.-C., Liu, B., Lodenquai, R., Lu, W.-J., Pavloff, R., Tang, D., Tsau, G., Tzeng, J.C., Vajdic, B., Verma, G., Wang, S., Wells, S., Winston, M., Yang, L.
Published in IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers (1989)
Published in IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers (1989)
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Conference Proceeding