Solder Fatigue Modeling of Flip-Chip Bumps in Molded Packages
Kar Wei Shim, Wai Yew Lo
Published in 2006 Thirty-First IEEE/CPMT International Electronics Manufacturing Technology Symposium (01.11.2006)
Published in 2006 Thirty-First IEEE/CPMT International Electronics Manufacturing Technology Symposium (01.11.2006)
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Conference Proceeding
High thermal conductive die attach material process characterization challenges
Khoo Ly Hoon, Lau Teck Beng, Lo Wai Yew
Published in 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013) (01.12.2013)
Published in 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013) (01.12.2013)
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Conference Proceeding
Ultraviolet Laser Diode Ablation Process for CMOS 45 nm Copper Low-K Semiconductor Wafer
Shi, Koh Wen, Kar, Yap Boon, Talik, Noor Azrina, Yew, Lo Wai
Published in Procedia engineering (2017)
Published in Procedia engineering (2017)
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Journal Article
Semiconductor device with bond wire reinforcement structure
Low, Boon Yew, Lo, Wai Yew, Tan, Lan Chu, Eu, Poh Leng, Siong, Chin Teck
Year of Publication 06.07.2021
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Year of Publication 06.07.2021
Patent
SEMICONDUCTOR DEVICE WITH BOND WIRE REINFORCEMMENT STRUCTURE
Low, Boon Yew, Lo, Wai Yew, Tan, Lan Chu, Eu, Poh Leng, Siong, Chin Teck
Year of Publication 02.04.2020
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Year of Publication 02.04.2020
Patent
Universal BGA substrate
Lo Wai Yew, Poh Zi Song, Foong Chee Seng, Khoo Ly Hoon, Koh Wen Shi, Yow Kai Yun
Year of Publication 04.07.2017
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Year of Publication 04.07.2017
Patent