Performance of piles with different configurations subjected to slope deformation induced by seismic liquefaction
Mao, Wuwei, Liu, Bangan, Rasouli, Rouzbeh, Aoyama, Shogo, Towhata, Ikuo
Published in Engineering geology (20.12.2019)
Published in Engineering geology (20.12.2019)
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Journal Article
A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR
Pang, Jian, Li, Zheng, Kubozoe, Ryo, Luo, Xueting, Wu, Rui, Wang, Yun, You, Dongwon, Fadila, Ashbir Aviat, Saengchan, Rattanan, Nakamura, Takeshi, Alvin, Joshua, Matsumoto, Daiki, Liu, Bangan, Narayanan, Aravind Tharayil, Qiu, Junjun, Liu, Hanli, Sun, Zheng, Huang, Hongye, Tokgoz, Korkut Kaan, Motoi, Keiichi, Oshima, Naoki, Hori, Shinichi, Kunihiro, Kazuaki, Kaneko, Tomoya, Shirane, Atsushi, Okada, Kenichi
Published in IEEE journal of solid-state circuits (01.09.2020)
Published in IEEE journal of solid-state circuits (01.09.2020)
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Journal Article
64-QAM 60-GHz CMOS Transceivers for IEEE 802.11ad/ay
Rui Wu, Minami, Ryo, Tsukui, Yuuki, Kawai, Seitaro, Seo, Yuuki, Sato, Shinji, Kimura, Kento, Kondo, Satoshi, Ueno, Tomohiro, Fajri, Nurul, Maki, Shoutarou, Nagashima, Noriaki, Takeuchi, Yasuaki, Yamaguchi, Tatsuya, Musa, Ahmed, Tokgoz, Korkut Kaan, Siriburanon, Teerachot, Bangan Liu, Yun Wang, Jian Pang, Ning Li, Miyahara, Masaya, Okada, Kenichi, Matsuzawa, Akira
Published in IEEE journal of solid-state circuits (01.11.2017)
Published in IEEE journal of solid-state circuits (01.11.2017)
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Journal Article
21.1 A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR
Pang, Jian, Li, Zheng, Kubozoe, Ryo, Luo, Xueting, Wu, Rui, Wang, Yun, You, Dongwon, Fadila, Ashbir Aviat, Saengchan, Rattanan, Nakamura, Takeshi, Alvin, Joshua, Matsumoto, Daiki, Narayanan, Aravind Tharayil, Liu, Bangan, Qiu, Junjun, Liu, Hanli, Sun, Zheng, Huang, Hongye, Tokgoz, Korkut Kaan, Motoi, Keiichi, Oshima, Naoki, Hori, Shinichi, Kunihiro, Kazuaki, Kaneko, Tomoya, Shirane, Atsushi, Okada, Kenichi
Published in 2019 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2019)
Published in 2019 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2019)
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Conference Proceeding
Shaking table tests on mitigation of liquefaction vulnerability for existing embedded lifelines
Otsubo, Masahide, Towhata, Ikuo, Hayashida, Toshihiko, Shimura, Masato, Uchimura, Taro, Liu, Bangan, Taeseri, Damoun, Cauvin, Bertrand, Rattez, Hadrien
Published in Soils and foundations (01.06.2016)
Published in Soils and foundations (01.06.2016)
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Journal Article
A 28GHz CMOS Phased-Array Transceiver Featuring Gain Invariance Based on LO Phase Shifting Architecture with 0.1-Degree Beam-Steering Resolution for 5G New Radio
Jian Pang, Rui Wu, Yun Wang, Dome, Masato, Kato, Hisashi, Hongye Huang, Narayanan, Aravind Tharayil, Hanli Liu, Bangan Liu, Nakamura, Takeshi, Fujimura, Takuya, Kawabuchi, Masaru, Kubozoe, Ryo, Miura, Tsuyoshi, Matsumoto, Daiki, Oshima, Naoki, Motoi, Keiichi, Hori, Shinichi, Kunihiro, Kazuaki, Kaneko, Tomoya, Okada, Kenichi
Published in 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) (01.06.2018)
Published in 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) (01.06.2018)
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Conference Proceeding
A 78 fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO
Sun, Zheng, Liu, Hanli, Xu, Dingxin, Huang, Hongye, Liu, Bangan, Li, Zheng, Pang, Jian, Someya, Teruki, Shirane, Atsushi
Published in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC) (01.09.2019)
Published in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC) (01.09.2019)
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Conference Proceeding
An LC-DCO based synthesizable injection-locked PLL with an FoM of −250.3dB
Dongsheng Yang, Wei Deng, Bangan Liu, Siriburanon, Teerachot, Okada, Kenichi, Matsuzawa, Akira
Published in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (01.09.2016)
Published in ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference (01.09.2016)
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Conference Proceeding
A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique
Liu, Bangan, Pang, Jian, Narayanan, Aravind Tharayil, Yang, Dongsheng, Liu, Hanli, Okada, Kenichi, Matsuzawa, Akira, Ngo, Huy Cu, Nakata, Kengo, Deng, Wei, Zhang, Yuncheng, Qiu, Junjun, Yoshioka, Torn, Emmei, Jun, Zhang, Haosheng
Published in 2018 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2018)
Published in 2018 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2018)
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Conference Proceeding
0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur
Zhang, Haosheng, Narayanan, Aravind Tharayil, Herdian, Hans, Liu, Bangan, Wang, Yun, Shirane, Atsushi, Okada, Kenichi
Published in 2019 Symposium on VLSI Circuits (01.06.2019)
Published in 2019 Symposium on VLSI Circuits (01.06.2019)
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Conference Proceeding
A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS
Wang, Yun, Wu, Rui, Pang, Jian, You, Dongwon, Fadila, Ashbir Aviat, Saengchan, Rattanan, Fu, Xi, Matsumoto, Daiki, Nakamura, Takeshi, Kubozoe, Ryo, Kawabuchi, Masaru, Liu, Bangan, Zhang, Haosheng, Qiu, Junjun, Liu, Hanli, Oshima, Naoki, Motoi, Keiichi, Hori, Shinichi, Kunihiro, Kazuaki, Kaneko, Tomoya, Shirane, Atsushi, Okada, Kenichi
Published in IEEE journal of solid-state circuits (01.05.2020)
Published in IEEE journal of solid-state circuits (01.05.2020)
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Journal Article
A 28-GHz CMOS Phased-Array Transceiver Based on LO Phase-Shifting Architecture With Gain Invariant Phase Tuning for 5G New Radio
Pang, Jian, Wu, Rui, Wang, Yun, Dome, Masato, Kato, Hisashi, Huang, Hongye, Tharayil Narayanan, Aravind, Liu, Hanli, Liu, Bangan, Nakamura, Takeshi, Fujimura, Takuya, Kawabuchi, Masaru, Kubozoe, Ryo, Miura, Tsuyoshi, Matsumoto, Daiki, Li, Zheng, Oshima, Naoki, Motoi, Keiichi, Hori, Shinichi, Kunihiro, Kazuaki, Kaneko, Tomoya, Shirane, Atsushi, Okada, Kenichi
Published in IEEE journal of solid-state circuits (01.05.2019)
Published in IEEE journal of solid-state circuits (01.05.2019)
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Journal Article
A 6.5-to-8-GHz Cascaded Dual-Fractional- N Digital PLL Achieving - 52.79-dBc Fractional Spur With 50-MHz Reference
Xu, Dingxin, Zhang, Yuncheng, Huang, Hongye, Sun, Zheng, Liu, Bangan, Fadila, Ashbir Aviat, Qiu, Junjun, Liu, Zezheng, Wang, Wenqian, Xiong, Yuang, Madany, Waleed, Shirane, Atsushi, Okada, Kenichi
Published in IEEE journal of solid-state circuits (29.08.2024)
Published in IEEE journal of solid-state circuits (29.08.2024)
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Journal Article
A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q Imbalance
Pang, Jian, Maki, Shotaro, Kawai, Seitarou, Nagashima, Noriaki, Seo, Yuuki, Dome, Masato, Kato, Hisashi, Katsuragi, Makihiko, Kimura, Kento, Kondo, Satoshi, Terashima, Yuki, Liu, Hanli, Siriburanon, Teerachot, Tharayil Narayanan, Aravind, Fajri, Nurul, Kaneko, Tohru, Yoshioka, Toru, Liu, Bangan, Wang, Yun, Wu, Rui, Li, Ning, Tokgoz, Korkut Kaan, Miyahara, Masaya, Shirane, Atsushi, Okada, Kenichi
Published in IEEE journal of solid-state circuits (01.05.2019)
Published in IEEE journal of solid-state circuits (01.05.2019)
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Journal Article
A pulse VCO with tail filter
Haosheng Zhang, Narayanan, Aravind Tharayil, Bangan Liu, Okada, Kenichi, Matsuzawa, Akira
Published in 2017 IEEE Asia Pacific Microwave Conference (APMC) (01.11.2017)
Published in 2017 IEEE Asia Pacific Microwave Conference (APMC) (01.11.2017)
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Conference Proceeding
A CMOS Dual-Polarized Phased-Array Beamformer Utilizing Cross-Polarization Leakage Cancellation for 5G MIMO Systems
Pang, Jian, Li, Zheng, Luo, Xueting, Alvin, Joshua, Saengchan, Rattanan, Fadila, Ashbir Aviat, Yanagisawa, Kiyoshi, Zhang, Yi, Chen, Zixin, Huang, Zhongliang, Gu, Xiaofan, Wu, Rui, Wang, Yun, You, Dongwon, Liu, Bangan, Sun, Zheng, Zhang, Yuncheng, Huang, Hongye, Oshima, Naoki, Motoi, Keiichi, Hori, Shinichi, Kunihiro, Kazuaki, Kaneko, Tomoya, Shirane, Atsushi, Okada, Kenichi
Published in IEEE journal of solid-state circuits (01.04.2021)
Published in IEEE journal of solid-state circuits (01.04.2021)
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Journal Article
A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration
Liu, Bangan, Zhang, Yuncheng, Qiu, Junjun, Ngo, Huy Cu, Deng, Wei, Nakata, Kengo, Yoshioka, Toru, Emmei, Jun, Pang, Jian, Narayanan, Aravind Tharayil, Zhang, Haosheng, Someya, Teruki, Shirane, Atsushi, Okada, Kenichi
Published in IEEE transactions on circuits and systems. I, Regular papers (01.02.2021)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.02.2021)
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Journal Article
A 28GHz CMOS Differential Bi-Directional Amplifier for 5G NR
Li, Zheng, Pang, Jian, Kubozoe, Ryo, Luo, Xueting, Wu, Rui, Wang, Yun, You, Dongwon, Fadila, Ashbir Aviat, Alvin, Joshua, Liu, Bangan, Sun, Zheng, Huang, Hongye, Shirane, Atsushi, Okada, Kenichi
Published in 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC) (01.01.2020)
Published in 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC) (01.01.2020)
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Conference Proceeding
A 32-kHz-Reference 2.4-GHz Fractional-N Oversampling PLL With 200-kHz Loop Bandwidth
Qiu, Junjun, Sun, Zheng, Liu, Bangan, Wang, Wenqian, Xu, Dingxin, Herdian, Hans, Huang, Hongye, Zhang, Yuncheng, Wang, Yun, Pang, Jian, Liu, Hanli, Miyahara, Masaya, Shirane, Atsushi, Okada, Kenichi
Published in IEEE journal of solid-state circuits (01.12.2021)
Published in IEEE journal of solid-state circuits (01.12.2021)
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Journal Article