Search Results - "Lin, Zhe-Hui" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Evaluation and Trend of Smart Clothing Research: Visualization Analysis Based on Bibliometric Analysis and Quantitative Statistics

Evaluation and Trend of Smart Clothing Research: Visualization Analysis Based on Bibliometric Analysis and Quantitative Statistics

by Lin, Zhe-Hui, Chen, Pei-Jie
Published in Fibers and polymers (01.04.2024)

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Journal Article

Research on Sound Imagery of Electric Shavers Based on Kansei Engineering and Multiple Artificial Neural Networks

Research on Sound Imagery of Electric Shavers Based on Kansei Engineering and Multiple Artificial Neural Networks

by Lin, Zhe-Hui, Woo, Jeng-Chung, Luo, Feng, Chen, Yu-Tong
Published in Applied sciences (01.10.2022)

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Journal Article

Multisensory Design of Electric Shavers Based on Kansei Engineering and Artificial Neural Networks

Multisensory Design of Electric Shavers Based on Kansei Engineering and Artificial Neural Networks

by Lin, Zhe-Hui, Woo, Jeng-Chung, Luo, Feng, Pan, Guo-Qing
Published in Mathematical problems in engineering (2023)

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Journal Article

Using orthogonal vectors to improve the ensemble space of the ensemble Kalman filter and its effect on data assimilation and forecasting

Using orthogonal vectors to improve the ensemble space of the ensemble Kalman filter and its effect on data assimilation and forecasting

by Cheng, Yung-Yun, Yang, Shu-Chih, Lin, Zhe-Hui, Lee, Yung-An
Published in Nonlinear processes in geophysics (21.07.2023)

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Journal Article

Ensemble Transform Kalman Incremental Smoother and Its Application to Data Assimilation and Prediction

Ensemble Transform Kalman Incremental Smoother and Its Application to Data Assimilation and Prediction

by Lin, Zhe-Hui, Yang, Shu-Chih, Kalnay, Eugenia
Published in Frontiers in applied mathematics and statistics (21.07.2021)

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Journal Article

A High Layer Scalability TSV-Based 3D-SRAM With Semi-Master-Slave Structure and Self-Timed Differential-TSV for High-Performance Universal-Memory-Capacity-Platforms

A High Layer Scalability TSV-Based 3D-SRAM With Semi-Master-Slave Structure and Self-Timed Differential-TSV for High-Performance Universal-Memory-Capacity-Platforms

by Meng-Fan Chang, Chih-Sheng Lin, Wei-Cheng Wu, Ming-Pin Chen, Yen-Huei Chen, Zhe-Hui Lin, Shyh-Shyuan Sheu, Tzu-Kun Ku, Cha-Hsin Lin, Yamauchi, H.
Published in IEEE journal of solid-state circuits (01.06.2013)

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Journal Article

Electrical testing of blind Through-Silicon Via (TSV) for 3D IC integration

Electrical testing of blind Through-Silicon Via (TSV) for 3D IC integration

by Jui-Feng Hung, Lau, J. H., Peng-Shu Chen, Shih-Hsien Wu, Shinn-Juh Lai, Ming-Lin Li, Shyh-Shyuan Sheu, Pei-Jer Tzeng, Zhe-Hui Lin, Tzu-Kun Ku, Wei-Chung Lo, Ming-Jer Kao
Published in 2012 IEEE 62nd Electronic Components and Technology Conference (01.05.2012)

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Conference Proceeding

Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) cell and read-disturb-free temperature-aware current-mode read scheme

Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) cell and read-disturb-free temperature-aware current-mode read scheme

by Meng-Fan Chang, Chia-Cheng Kuo, Shyh-Shyuan Sheu, Chorng-Jung Lin, Ya-Chin King, Zhe-Hui Lin, Keng-Li Su, Yu-Sheng Chen, Wen-Pin Lin, Heng-Yuan Lee, Chen-Han Tsai, Wei-Su Chen, Chen, Frederick T., Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai, Jui-Jen Wu, Yu-Der Chih, Natarajan, Sreedhar
Published in 2013 Symposium on VLSI Technology (01.06.2013)

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Conference Proceeding

An Electrical Testing Method for Blind Through Silicon Vias (TSVs) for 3D IC Integration

An Electrical Testing Method for Blind Through Silicon Vias (TSVs) for 3D IC Integration

by SHEU, Shyh-Shyuan, LIN, Zhe-Hui, KU, Tzu-Kun, LO, Wei-Chung, KAO, Ming-Jer, HUNG, Jui-Feng, LAU, John H, CHEN, Peng-Shu, WU, Shih-Hsien, SU, Keng-Li, LIN, Chih-Sheng, LAI, Shinn-Juh, CHENG, Kuo-Hsing
Published in Journal of microelectronics and electronic packaging (01.10.2011)

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Journal Article

FEEDBACK CONTROL DEVICE AND FEEDBACK CONTROL METHOD FOR DC-to-DC CONVERTER

FEEDBACK CONTROL DEVICE AND FEEDBACK CONTROL METHOD FOR DC-to-DC CONVERTER

by Cheng, Lan-Shan, Lin, Zhe Hui, Chen, Wei-Ling
Year of Publication 03.10.2024

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Patent

Power converter and converting method with light loading state control

Power converter and converting method with light loading state control

by Ding, Zhen-Guo, Chen, Ching-Jan, Tsai, Chieh-Ju, Lin, Zhe-Hui, Chen, Wei-Ling
Year of Publication 10.09.2024

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Patent

Ramp generation in buck converters

Ramp generation in buck converters

by Ding, Zhen-Guo, Chen, Ching-Jan, Tsai, Chieh-Ju, Lin, Zhe-Hui, Chen, Wei-Ling
Year of Publication 30.04.2024

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Patent

POWER CONVERTER AND CONVERTING METHOD

POWER CONVERTER AND CONVERTING METHOD

by CHEN, Wei-Ling, TSAI, Chieh-Ju, LIN, Zhe-Hui, CHEN, Ching-Jan, DING, Zhen-Guo
Year of Publication 25.08.2022

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Patent

POWER CONVERTER AND CONVERTING METHOD

POWER CONVERTER AND CONVERTING METHOD

by CHEN, Wei-Ling, TSAI, Chieh-Ju, LIN, Zhe-Hui, CHEN, Ching-Jan, DING, Zhen-Guo
Year of Publication 25.08.2022

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Patent

Power converter and converting method

Power converter and converting method

by CHEN, CHING-JAN, CHEN, WEI-LING, TSAI, CHIEH-JU, DING, ZHEN-GUO, LIN, ZHE-HUI
Year of Publication 11.03.2024

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Patent

Power converter and converting method

Power converter and converting method

by CHEN, CHING-JAN, CHEN, WEI-LING, TSAI, CHIEH-JU, DING, ZHEN-GUO, LIN, ZHE-HUI
Year of Publication 01.04.2023

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Patent

Power converter and converting method

Power converter and converting method

by CHEN, CHING-JAN, CHEN, WEI-LING, TSAI, CHIEH-JU, DING, ZHEN-GUO, LIN, ZHE-HUI
Year of Publication 01.09.2022

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Patent

Power converter and converting method

Power converter and converting method

by CHEN, CHING-JAN, CHEN, WEI-LING, TSAI, CHIEH-JU, DING, ZHEN-GUO, LIN, ZHE-HUI
Year of Publication 01.09.2022

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Patent

Testing and repairing apparatus of through silicon via in stacked-chip

Testing and repairing apparatus of through silicon via in stacked-chip

by LAI HSINI, LIN ZHE-HUI, CHIU PI-FENG, LIN CHIH-SHENG
Year of Publication 21.07.2015

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Patent

Varactor that applies bias voltage to two through wafer vias to determine capacitance of depletion region capacitor formed between the two through wafer vias

Varactor that applies bias voltage to two through wafer vias to determine capacitance of depletion region capacitor formed between the two through wafer vias

by LIN ZHE-HUI, LIN CHIH-SHENG, LI SIH-HAN, TSENG PEI-LING
Year of Publication 07.07.2015

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Patent