Search Results - "Lie, Sean" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Inside the Cerebras Wafer-Scale Cluster

Inside the Cerebras Wafer-Scale Cluster

by Lie, Sean
Published in IEEE MICRO (01.05.2024)

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Journal Article

Cerebras Architecture Deep Dive: First Look Inside the Hardware/Software Co-Design for Deep Learning

Cerebras Architecture Deep Dive: First Look Inside the Hardware/Software Co-Design for Deep Learning

by Lie, Sean
Published in IEEE MICRO (01.05.2023)

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Journal Article

Cerebras Architecture Deep Dive: First Look Inside the HW/SW Co-Design for Deep Learning : Cerebras Systems

Cerebras Architecture Deep Dive: First Look Inside the HW/SW Co-Design for Deep Learning : Cerebras Systems

by Lie, Sean
Published in 2022 IEEE Hot Chips 34 Symposium (HCS) (21.08.2022)

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Conference Proceeding

Multi-Million Core, Multi-Wafer AI Cluster

Multi-Million Core, Multi-Wafer AI Cluster

by Lie, Sean
Published in 2021 IEEE Hot Chips 33 Symposium (HCS) (22.08.2021)

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Conference Proceeding

Wafer-Scale AI: GPU Impossible Performance

Wafer-Scale AI: GPU Impossible Performance

by Lie, Sean
Published in 2024 IEEE Hot Chips 36 Symposium (HCS) (25.08.2024)

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Conference Proceeding

Inside the Cerebras Wafer-Scale Cluster: Cerebras Systems

Inside the Cerebras Wafer-Scale Cluster: Cerebras Systems

by Lie, Sean
Published in 2023 IEEE Hot Chips 35 Symposium (HCS) (27.08.2023)

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Conference Proceeding

TASK ACTIVATION FOR ACCELERATED DEEP LEARNING

TASK ACTIVATION FOR ACCELERATED DEEP LEARNING

by MICHAEL MORRISON, SRIKANTH AREKAPUDI, MICHAEL EDWIN JAMES, GARY R LAUTERBACH, LIE SEAN
Year of Publication 29.07.2021

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Patent

DATA FLOW TRIGGER TASK FOR ACCELERATED DEEP LEARNING

DATA FLOW TRIGGER TASK FOR ACCELERATED DEEP LEARNING

by MICHAEL MORRISON, SRIKANTH AREKAPUDI, MICHAEL EDWIN JAMES, GARY R LAUTERBACH, LIE SEAN
Year of Publication 29.07.2021

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Patent

ACCELERATED DEEP LEARNING

ACCELERATED DEEP LEARNING

by MICHAEL MORRISON, SRIKANTH AREKAPUDI, MICHAEL EDWIN JAMES, GARY R LAUTERBACH, LIE SEAN
Year of Publication 27.05.2021

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Patent

가속화된 심층 학습

가속화된 심층 학습

by JAMES MICHAEL EDWIN, MORRISON MICHAEL, LIE SEAN, LAUTERBACH GARY R, AREKAPUDI SRIKANTH
Year of Publication 08.02.2021

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Patent

NEURON SMEARING FOR ACCELERATED DEEP LEARNING

NEURON SMEARING FOR ACCELERATED DEEP LEARNING

by MICHAEL MORRISON, SRIKANTH AREKAPUDI, MICHAEL EDWIN JAMES, GARY R LAUTERBACH, LIE SEAN
Year of Publication 24.12.2020

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Patent

DISTRIBUTED DISPATCH WITH CONCURRENT, OUT-OF-ORDER DISPATCH

DISTRIBUTED DISPATCH WITH CONCURRENT, OUT-OF-ORDER DISPATCH

by SHEN GENE W, LIE SEAN
Year of Publication 02.11.2009

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Patent

Sparse-IFT: Sparse Iso-FLOP Transformations for Maximizing Training Efficiency

Sparse-IFT: Sparse Iso-FLOP Transformations for Maximizing Training Efficiency

by Thangarasa, Vithursan, Saxena, Shreyas, Gupta, Abhay, Lie, Sean
Year of Publication 20.03.2023

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Journal Article

MediSwift: Efficient Sparse Pre-trained Biomedical Language Models

MediSwift: Efficient Sparse Pre-trained Biomedical Language Models

by Thangarasa, Vithursan, Salem, Mahmoud, Saxena, Shreyas, Leong, Kevin, Hestness, Joel, Lie, Sean
Published in arXiv.org (07.08.2024)

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Paper Journal Article

SPDF: Sparse Pre-training and Dense Fine-tuning for Large Language Models

SPDF: Sparse Pre-training and Dense Fine-tuning for Large Language Models

by Thangarasa, Vithursan, Gupta, Abhay, Marshall, William, Li, Tianda, Leong, Kevin, DeCoste, Dennis, Lie, Sean, Saxena, Shreyas
Published in arXiv.org (29.07.2023)

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Paper Journal Article

Thin provisioning architecture for high seek-time devices

Thin provisioning architecture for high seek-time devices

by Lie Sean
Year of Publication 15.08.2017

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Patent

Enabling High-Sparsity Foundational Llama Models with Efficient Pretraining and Deployment

Enabling High-Sparsity Foundational Llama Models with Efficient Pretraining and Deployment

by Agarwalla, Abhinav, Gupta, Abhay, Marques, Alexandre, Pandit, Shubhra, Goin, Michael, Kurtic, Eldar, Leong, Kevin, Nguyen, Tuan, Salem, Mahmoud, Alistarh, Dan, Lie, Sean, Kurtz, Mark
Published in arXiv.org (06.05.2024)

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Paper Journal Article

A novel system architecture for web scale applications using lightweight CPUs and virtualized I/O

A novel system architecture for web scale applications using lightweight CPUs and virtualized I/O

by Sudan, K., Balakrishnan, S., Lie, S., Min Xu, Mallick, D., Lauterbach, G., Balasubramonian, R.
Published in 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA) (01.02.2013)

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Conference Proceeding

Sparse-IFT: Sparse Iso-FLOP Transformations for Maximizing Training Efficiency

Sparse-IFT: Sparse Iso-FLOP Transformations for Maximizing Training Efficiency

by Thangarasa, Vithursan, Saxena, Shreyas, Gupta, Abhay, Lie, Sean
Published in arXiv.org (17.07.2024)

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Paper

CACHING OF MICROCODE EMULATION MEMORY

CACHING OF MICROCODE EMULATION MEMORY

by HOLLOWAY BRUCE R, LAUTERBACH GARY, BUTLER MICHAEL GERARD, LIE SEAN
Year of Publication 02.03.2010

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Patent

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