Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)
Dae Hyun Kim, Athikulwongse, Krit, Healy, Michael B., Hossain, Mohammad M., Moongon Jung, Khorosh, Ilya, Kumar, Gokul, Young-Joon Lee, Lewis, Dean L., Tzu-Wei Lin, Chang Liu, Panth, Shreepad, Pathak, Mohit, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Loh, Gabriel H., Lee, Hsien-Hsin S., Sung Kyu Lim
Published in IEEE transactions on computers (01.01.2015)
Published in IEEE transactions on computers (01.01.2015)
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Journal Article
An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth
Dong Hyuk Woo, Nak Hee Seong, Lewis, Dean L, Lee, Hsien-Hsin S
Published in HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture (01.01.2010)
Published in HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture (01.01.2010)
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Conference Proceeding
Designing 3D test wrappers for pre-bond and post-bond test of 3D embedded cores
Lewis, D. L., Panth, S., Xin Zhao, Sung Kyu Lim, Lee, H-H S.
Published in 2011 IEEE 29th International Conference on Computer Design (ICCD) (01.10.2011)
Published in 2011 IEEE 29th International Conference on Computer Design (ICCD) (01.10.2011)
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Conference Proceeding
Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory
Healy, M B, Athikulwongse, K, Goel, R, Hossain, M M, Kim, D H, Young-Joon Lee, Lewis, D L, Tzu-Wei Lin, Chang Liu, Moongon Jung, Ouellette, B, Pathak, M, Sane, H, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Loh, G H, Lee, H S, Sung Kyu Lim
Published in IEEE Custom Integrated Circuits Conference 2010 (01.09.2010)
Published in IEEE Custom Integrated Circuits Conference 2010 (01.09.2010)
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Conference Proceeding
Architectural evaluation of 3D stacked RRAM caches
Lewis, D.L., Lee, H.-H.S.
Published in 2009 IEEE International Conference on 3D System Integration (01.09.2009)
Published in 2009 IEEE International Conference on 3D System Integration (01.09.2009)
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Conference Proceeding
Pre-bond testable low-power clock tree design for 3D stacked ICs
Xin Zhao, Lewis, D.L., Lee, H.-H.S., Sung Kyu Lim
Published in 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers (01.11.2009)
Published in 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers (01.11.2009)
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Conference Proceeding
Testing Circuit-Partitioned 3D IC Designs
Lewis, D.L., Lee, H.-H.S.
Published in 2009 IEEE Computer Society Annual Symposium on VLSI (01.05.2009)
Published in 2009 IEEE Computer Society Annual Symposium on VLSI (01.05.2009)
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Conference Proceeding
High Performance Non-blocking Switch Design in 3D Die-Stacking Technology
Lewis, D.L., Yalamanchili, S., Lee, H.-H.S.
Published in 2009 IEEE Computer Society Annual Symposium on VLSI (01.05.2009)
Published in 2009 IEEE Computer Society Annual Symposium on VLSI (01.05.2009)
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Conference Proceeding