CoNfasTT: A Configurable, Scalable, and Fast Dual Mode Logic-Based NTT Design
Cohen, Eldar, Yavits, Leonid, Zaidel, Benjamin M., Fish, Alexander, Levi, Itamar
Published in IEEE access (2024)
Published in IEEE access (2024)
Get full text
Journal Article
Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads
Weizman, Yoav, Giterman, Robert, Chertkow, Oron, Wicentowski, Maoz, Levi, Itamar, Sever, Ilan, Kehati, Ishai, Keren, Osnat, Fish, Alexander
Published in IEEE access (2021)
Published in IEEE access (2021)
Get full text
Journal Article
A Survey of the Sensitivities of Security Oriented Flip-Flop Circuits
Levi, Itamar, Miller, Netanel, Avni, Elad, Keren, Osnat, Fish, Alexander
Published in IEEE access (01.01.2017)
Published in IEEE access (01.01.2017)
Get full text
Journal Article
Garbled Circuits from an SCA Perspective: Free XOR can be Quite Expensive
Levi, Itamar, Hazay, Carmit
Published in IACR transactions on cryptographic hardware and embedded systems (06.03.2023)
Published in IACR transactions on cryptographic hardware and embedded systems (06.03.2023)
Get full text
Journal Article
Garbled Circuits from an SCA Perspective
Itamar Levi, Carmit Hazay
Published in IACR transactions on cryptographic hardware and embedded systems (01.03.2023)
Published in IACR transactions on cryptographic hardware and embedded systems (01.03.2023)
Get full text
Journal Article
Analytical Side Channel EM models, Extending Simulation Abilities for ICs, and Linking Physical-Models to Cryptographic Metrics
Katz, Edut, Avital, Moshe, Weizman, Yoav, Levi, Itamar
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.12.2023)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.12.2023)
Get full text
Journal Article
Hardware Private Circuits: From Trivial Composition to Full Verification
Cassiers, Gaetan, Gregoire, Benjamin, Levi, Itamar, Standaert, Francois-Xavier
Published in IEEE transactions on computers (01.10.2021)
Published in IEEE transactions on computers (01.10.2021)
Get full text
Journal Article
An 88-fJ/40-MHz [0.4 V]–0.61-pJ/1-GHz [0.9 V] Dual-Mode Logic 8 [Formula Omitted] 8 bit Multiplier Accumulator With a Self-Adjustment Mechanism in 28-nm FD-SOI
Taco, Ramiro, Levi, Itamar, Lanuzza, Marco, Fish, Alexander
Published in IEEE journal of solid-state circuits (01.02.2019)
Published in IEEE journal of solid-state circuits (01.02.2019)
Get full text
Journal Article