Method to form an inverted staircase STI structure by etch-deposition-etch and selective epitaxial growth
Pradeep, Yelehanka Ramachandramurthy, Zheng, Jia Zhen, Chan, Lap, Quek, Elgin, Sundaresan, Ravi, Pan, Yang, Lee, James Yong Meng, Leung, Ying Keung
Year of Publication 08.10.2002
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Year of Publication 08.10.2002
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MANUFACTURING METHOD FOR GATE ELECTRODE
RAP CHAN, SUNDARESAN RAVI, ZHENG JIA ZHEN, LEUNG YING KEUNG, PAN YANG, LEE JAMES YONG MENG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN
Year of Publication 04.10.2002
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Year of Publication 04.10.2002
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METHOD FOR FORMING TRANSISTOR GATE DIELECTRIC HAVING HIGH DIELECTRIC CONSTANT REGION AND LOW DIELECTRIC CONSTANT REGION
RAP CHAN, ZHENG JIA ZHEN, SUNDARESAN RAVI, LEUNG YING KEUNG, PAN YANG, LEE JAMES YONG MENG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN
Year of Publication 04.10.2002
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Year of Publication 04.10.2002
Patent
Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs)
ZHENG JIA ZHEN, SUNDARESAN RAVI, LEUNG YING KEUNG, PAN YANG, LEE JAMES YONG MENG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN, CHAN LAP
Year of Publication 24.09.2002
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Year of Publication 24.09.2002
Patent
Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs)
Zheng, Jia Zhen, Chan, Lap, Quek, Elgin, Sundaresan, Ravi, Pan, Yang, Lee, James Yong Meng, Leung, Ying Keung, Pradeep, Yelehanka Ramachandramurthy
Year of Publication 24.09.2002
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Year of Publication 24.09.2002
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METHOD FOR FORMING BUBBLE-LIKE SHALLOW TRENCH SEPARATION, USING MICROMACHINING TECHNOLOGY TO REMOVE HEAVILY-DOPED SILICON
RAP CHAN, ZHENG JIA ZHEN, SUNDARESAN RAVI, LEUNG YING KEUNG, PAN YANG, LEE JAMES YONG MENG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN
Year of Publication 20.09.2002
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Year of Publication 20.09.2002
Patent
METHOD OF MANUFACTURING GATE DIELECTIC AND SEMICONDUCTOR GATE
RAP CHAN, ZHENG JIA ZHEN, SUNDARESAN RAVI, LEUNG YING KEUNG, PAN YANG, LEE JAMES YONG MENG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN
Year of Publication 20.09.2002
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Year of Publication 20.09.2002
Patent
Method to control the channel length of a vertical transistor by first forming channel using selective epi and source/drain using implantation
Leung, Ying Keung, Pradeep, Yelehanka Ramachandramurthy, Zheng, Jia Zhen, Chan, Lap, Quek, Elgin, Sundaresan, Ravi, Pan, Yang, Lee, James Yong Meng
Year of Publication 20.08.2002
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Year of Publication 20.08.2002
Patent
Method for forming variable-K gate dielectric
Lee, James Yong Meng, Leung, Ying Keung, Pradeep, Yelehanka Ramachandramurthy, Zheng, Jia Zhen, Chan, Lap, Quek, Elgin, Sundaresan, Ravi, Pan, Yang
Year of Publication 20.08.2002
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Year of Publication 20.08.2002
Patent
Method for forming variable-K gate dielectric
ZHENG JIA ZHEN, SUNDARESAN RAVI, LEUNG YING KEUNG, PAN YANG, LEE JAMES YONG MENG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN, CHAN LAP
Year of Publication 20.08.2002
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Year of Publication 20.08.2002
Patent
Method to control the channel length of a vertical transistor by first forming channel using selective epi and source/drain using implantation
ZHENG JIA ZHEN, SUNDARESAN RAVI, LEUNG YING KEUNG, PAN YANG, LEE JAMES YONG MENG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN, CHAN LAP
Year of Publication 20.08.2002
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Year of Publication 20.08.2002
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