Method to form elevated source/drain using poly spacer
SUNDARENSAN RAVI, KEUNG LEUNG YING, ZHENG JIA ZHEN, PAN YANG, MENG LEE YONG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN, CHAN LAP
Year of Publication 20.05.2003
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Year of Publication 20.05.2003
Patent
Method for forming a lightly doped source and drain structure using an L-shaped spacer
ZHOU; MEI SHENG, PRADEEP; YELEHANKA RAMACHANDRAMURTHY, LEUNG; YING KEUNG, YU; JIE
Year of Publication 05.12.2000
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Year of Publication 05.12.2000
Patent
Method to form and/or isolate vertical transistors
Quek, Elgin, Sundaresan, Ravi, Pan, Yang, Lee, Yong Meng, Leung, Ying Keung, Pradeep, Yelehanka Ramachandramurthy, Zheng, Jia Zhen, Chan, Lap
Year of Publication 28.01.2003
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Year of Publication 28.01.2003
Patent
Method to form and/or isolate vertical transistors
SUNDARESAN RAVI, LEE YONG MENG, ZHENG JIA ZHEN, LEUNG YING KEUNG, PAN YANG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN, CHAN LAP
Year of Publication 28.01.2003
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Year of Publication 28.01.2003
Patent
METHOD FOR FORMING VARIABLE-K GATE DIELECTRIC
YELEHANKA RAMACHANDRAMURTHY PRADEEP, JIA ZHEN ZHENG, RAVI SUNDARESAN, YANG PAN, JAMES YONG MENG LEE, ELGIN QUEK, YING KEUNG LEUNG, LAP CHAN
Year of Publication 28.01.2005
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Year of Publication 28.01.2005
Patent
A method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs)
SUNDARESAN, RAVI, RAMACHANDRAMURTHY PRADEEP, YELEHANKA, QUEK, ELGIN, CHAN, LAP, KEUNG LEUNG, YING, ZHEN ZHENG, JIA, YONG MENG LEE, JAMES, PAN, YANG
Year of Publication 10.11.2004
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Year of Publication 10.11.2004
Patent
A METHOD TO FORM ELEVATED SOURCE/DRAIN USING POLY SPACER
YELEHANKA RAMACHANDRAMURTHY PRADEEP, JIA ZHEN ZHENG, RAVI SUNDARESAN, LEE YONG MENG JAMES, LEUNG YING KEUNG, YANG PAN, ELGIN QUEK, LAP CHAN
Year of Publication 21.06.2004
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Year of Publication 21.06.2004
Patent
A METHOD TO FORM AND/OR ISOLATE VERTICAL TRANSISTORS
RAVI SUNDARESAN, YELEHANKA RAMACHANDRAMURTHY PRADEEP, JIA ZHEN ZHENG, YANG PAN, ELGIN QUEK, JAMES YONG MENG LEE, YING KEUNG LEUNG, LAP CHAN
Year of Publication 29.04.2004
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Year of Publication 29.04.2004
Patent
A METHOD TO FORM A LOW PARASITIC CAPACITANCE PSEUDO-SOI CMOS DEVICE
RAVI SUNDARESAN, JAMES LEE YONG MENG, YELEHANKA RAMACHANDRAMURTHY PRADEEP, JIA ZHEN ZHENG, LEUNG YING KEUNG, YANG PAN, ELGIN QUEK, LAP CHAN
Year of Publication 26.03.2004
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Year of Publication 26.03.2004
Patent
Method for forming variable-K gate dielectric
ZHENG JIA ZHEN, SUNDARESAN RAVI, LEUNG YING KEUNG, PAN YANG, LEE JAMES YONG MENG, PRADEEP YELEHANKA RAMACHANDRAMURTHY, QUEK ELGIN, CHAN LAP
Year of Publication 23.03.2004
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Year of Publication 23.03.2004
Patent
Method for forming variable-K gate dielectric
Lee, James Yong Meng, Leung, Ying Keung, Pradeep, Yelehanka Ramachandramurthy, Zheng, Jia Zhen, Chan, Lap, Quek, Elgin, Sundaresan, Ravi, Pan, Yang
Year of Publication 23.03.2004
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Year of Publication 23.03.2004
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METHOD FOR FABRICATING A SELF ALIGNED S/D CMOS DEVICE ON INSULATED LAYER BY FORMING A TRENCH ALONG THE STI AND FILL WITH OXIDE
JIA ZHEN ZHENG, RAVI SUNDARESAN, YELEHANKA RAMACHANDRAMURTHY PRADEEP, YANG PAN, ELGIN QUEK, JAMES YONG MENG LEE, YING KEUNG LEUNG, LAP CHAN
Year of Publication 26.12.2003
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Year of Publication 26.12.2003
Patent
Method for forming a gate dielectric with high-K and low-K regions
SUNDARESAN, RAVI, PRADEEP,YELEHANKA RAMACHANDRAMURTHY, ZHENG, JIA ZHEN, QUEK, ELGIN, CHAN, LAP, LEE, JAMES YONG MENG, LEUNG, YING KEUNG, PAN, YANG
Year of Publication 03.12.2003
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Year of Publication 03.12.2003
Patent
A METHOD TO FORM VERY HIGH MOBILITY VERTICAL CHANNEL TRANSISTOR BY SELECTIVE DEPOSITION OF SIGE OR MULTI-QUANTUM WELLS (MQWS)
JIA ZHEN ZHENG, RAVI SUNDARESAN, YELEHANKA RAMACHANDRAMURTHY PRADEEP, YANG PAN, ELGIN QUEK, JAMES YONG MENG LEE, YING KEUNG LEUNG, LAP CHAN
Year of Publication 27.11.2003
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Year of Publication 27.11.2003
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