Multi-Slew-Rate Output Driver and Optimized Impedance-Calibration Circuit for 66nm 3.0Gb/s/pin DRAM Interface
Lee, Dong Uk, Kang, Shin Deok, Park, Nak Kyu, Lee, Hyun Woo, Choi, Young Kyoung, Lee, Jung Woo, Kwack, Seung Wook, Lee, Hyeong Ouk, Yun, Won Joo, Shin, Sang Hoon, Kim, Kwan Weon, Choi, Young Jung, Yang, Ye Seok
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
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