Merged DRAM with Logic/Analog (MDLA) Technology for Single-Chip Solution
Yoon, Jong Shik, Yu, Sunil, Lee, Hyae Ryoung, Kwon, Chul-Soon, Kim, Dong Woo, Kim, Won Chul, Choi, Chang-Sik
Published in Japanese Journal of Applied Physics (01.04.1999)
Published in Japanese Journal of Applied Physics (01.04.1999)
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Journal Article
Fully working 1.25 /spl mu/m/sup 2/ 6T-SRAM cell with 45 nm gate length triple gate transistors
Jeong-Hwan Yang, You-Seung Jin, Hyae-Ryoung Lee, Kyoung-Seok Rha, Jung-A Choi, Su-Kon Bae, Maeda, S., Young-Wug Kim, Kwang-Pyuk Suh
Published in IEEE International Electron Devices Meeting 2003 (2003)
Published in IEEE International Electron Devices Meeting 2003 (2003)
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Conference Proceeding