An experimental 80-ns 1-Mbit DRAM with fast page operation
Kalter, H.L., Coppens, P.D., Ellis, W.F., Fifield, J.A., Kokoszka, D.J., Leasure, T.L., Miller, C.P., Nguyen, Q., Papritz, R.E., Patton, C.S., Poplawski, J.M., Tomashot, S.W., van der Hoeven, W.B.
Published in IEEE journal of solid-state circuits (01.10.1985)
Published in IEEE journal of solid-state circuits (01.10.1985)
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