Search Results - "LIN, CHARLES W. C" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

INTERCONNECT SUBSTRATE HAVING STRESS MODULATOR AND FLIP CHIP ASSEMBLY THEREOF

INTERCONNECT SUBSTRATE HAVING STRESS MODULATOR AND FLIP CHIP ASSEMBLY THEREOF

by LIN CHARLES W. C, WANG CHIA CHUNG
Year of Publication 15.05.2020

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Patent

LEADFRAME SUBSTRATE HAVING MODULATOR AND CRACK INHIBITING STRUCTURE AND FLIP CHIP ASSEMBLY USING THE SAME

LEADFRAME SUBSTRATE HAVING MODULATOR AND CRACK INHIBITING STRUCTURE AND FLIP CHIP ASSEMBLY USING THE SAME

by LIN CHARLES W. C, WANG CHIA CHUNG
Year of Publication 05.02.2020

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Patent

Key components of a hepatobiliary surgery curriculum for general surgery residents: results of the FULCRUM International Delphi consensus

Key components of a hepatobiliary surgery curriculum for general surgery residents: results of the FULCRUM International Delphi consensus

by Rashidian, Nikdokht, Willaert, Wouter, Van Herzeele, Isabelle, Morise, Zenichi, Alseidi, Adnan, Troisi, Roberto I., Alabbad, Saleh, Doyle, Maria B., Briceño-Delgado, Javier, Calise, Fulvio, Ceppa, Eugene P., Chen, Kuo-Hsin, Cherqui, Daniel, Cheung, Tan T., Lin, Charles C.-W., Cleary, Sean, David Kwon, Choon H., Dominguez-Rosado, Ismael, Ferrero, Alessandro, Warner, Susanne G., Grazi, Gian L., Hammill, Chet, Han, Ho-Seong, Hansen, Paul, Helton, Scott, Itano, Osamu, Jafarian, Ali, Jeyarajah, Rohan, Kaneko, Hironori, Kato, Yutaro, Kubo, Shoji, Li, Jun, Lucidi, Valerio, Majno, Pietro, Maynard, Erin, Montalti, Roberto, Nadalin, Silvio, Nitta, Hiroyuki, Otsuka, Yuichiro, Rotellar, Fernando, Samstein, Benjamin, Soubrane, Olivier, Sugioka, Atsushi, Tanabe, Minoru, Torzilli, Guido, Vanlander, Aude, Wakabayashi, Go
Published in HPB (Oxford, England) (01.10.2020)

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Journal Article

MULTI-LEVEL STAGGERED TERMINAL STRUCTURE AND SEMICONDUCTOR PACKAGE AND ASSEMBLY USING THE SAME

MULTI-LEVEL STAGGERED TERMINAL STRUCTURE AND SEMICONDUCTOR PACKAGE AND ASSEMBLY USING THE SAME

by LIN, Charles W. C, WANG, Chia-Chung
Year of Publication 21.03.2024

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Patent

SEMICONDUCTOR ASSEMBLY HAVING DUAL CONDUCTION CHANNELS FOR ELECTRICITY AND HEAT PASSAGE

SEMICONDUCTOR ASSEMBLY HAVING DUAL CONDUCTION CHANNELS FOR ELECTRICITY AND HEAT PASSAGE

by LIN, Charles W. C, WANG, Chia-Chung
Year of Publication 22.02.2024

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Patent

THERMALLY ENHANCED ASSEMBLY WITH METALLIC INTERFACIAL STRUCTURE BETWEEN HEAT GENERATING COMPONENT AND HEAT SPREADER

THERMALLY ENHANCED ASSEMBLY WITH METALLIC INTERFACIAL STRUCTURE BETWEEN HEAT GENERATING COMPONENT AND HEAT SPREADER

by LIN, Charles W. C
Year of Publication 24.09.2020

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Patent

Leadframe substrate having modulator and crack inhibiting structure and flip chip assembly using the same

Leadframe substrate having modulator and crack inhibiting structure and flip chip assembly using the same

by Wang, Chia-Chung, Lin, Charles W. C
Year of Publication 29.03.2022

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Patent

INTERCONNECT SUBSTRATE HAVING BUFFER MATERIAL AND CRACK STOPPER AND SEMICONDUCTOR ASSEMBLY USING THE SAME

INTERCONNECT SUBSTRATE HAVING BUFFER MATERIAL AND CRACK STOPPER AND SEMICONDUCTOR ASSEMBLY USING THE SAME

by LIN, Charles W. C, WANG, Chia-Chung
Year of Publication 16.09.2021

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Patent

Interconnect substrate with stiffener and warp balancer and semiconductor assembly using the same

Interconnect substrate with stiffener and warp balancer and semiconductor assembly using the same

by Wang, Chia-Chung, Lin, Charles W. C
Year of Publication 13.10.2020

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Patent

SEMICONDUCTOR ASSEMBLY HAVING DUAL WIRING STRUCTURES AND WARP BALANCER

SEMICONDUCTOR ASSEMBLY HAVING DUAL WIRING STRUCTURES AND WARP BALANCER

by LIN, Charles W. C, WANG, Chia-Chung
Year of Publication 07.05.2020

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Patent

INTERCONNECT SUBSTRATE WITH ETCHING STOPPERS WITHIN CAVITY AND METAL LEADS AROUND CAVITY AND SEMICONDUCTOR ASSEMBLY USING THE SAME

INTERCONNECT SUBSTRATE WITH ETCHING STOPPERS WITHIN CAVITY AND METAL LEADS AROUND CAVITY AND SEMICONDUCTOR ASSEMBLY USING THE SAME

by LIN, Charles W. C, WANG, Chia-Chung
Year of Publication 30.04.2020

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Patent

3-D STACKING SEMICONDUCTOR ASSEMBLY HAVING HEAT DISSIPATION CHARACTERISTICS

3-D STACKING SEMICONDUCTOR ASSEMBLY HAVING HEAT DISSIPATION CHARACTERISTICS

by LIN, Charles W. C, WANG, Chia-Chung
Year of Publication 19.03.2020

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Patent

Methods of making wiring substrate for stackable semiconductor assembly and making stackable semiconductor assembly

Methods of making wiring substrate for stackable semiconductor assembly and making stackable semiconductor assembly

by Wang, Chia-Chung, Lin, Charles W. C
Year of Publication 28.01.2020

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Patent

WIRING BOARD HAVING BRIDGING ELEMENT STRADDLING OVER INTERFACES

WIRING BOARD HAVING BRIDGING ELEMENT STRADDLING OVER INTERFACES

by Wang, Chia-Chung, Lin, Charles W. C
Year of Publication 31.10.2019

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Patent

Face-to-face semiconductor assembly having semiconductor device in dielectric recess

Face-to-face semiconductor assembly having semiconductor device in dielectric recess

by Wang, Chia-Chung, Lin, Charles W. C
Year of Publication 15.10.2019

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Patent

Wiring board having electrical isolator and moisture inhibiting cap incorporated therein and method of making the same

Wiring board having electrical isolator and moisture inhibiting cap incorporated therein and method of making the same

by Wang, Chia-Chung, Lin, Charles W. C
Year of Publication 17.09.2019

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Patent

HEAT CONDUCTIVE WIRING BOARD AND SEMICONDUCTOR ASSEMBLY USING THE SAME

HEAT CONDUCTIVE WIRING BOARD AND SEMICONDUCTOR ASSEMBLY USING THE SAME

by LIN, Charles W. C, WANG, Chia-Chung
Year of Publication 29.08.2019

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Patent

Wiring board having isolator and bridging element and method of making wiring board

Wiring board having isolator and bridging element and method of making wiring board

by Wang, Chia-Chung, Lin, Charles W. C
Year of Publication 23.07.2019

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Patent

Semiconductor assembly with electromagnetic shielding and thermally enhanced characteristics and method of making the same

Semiconductor assembly with electromagnetic shielding and thermally enhanced characteristics and method of making the same

by Wang, Chia-Chung, Lin, Charles W. C
Year of Publication 16.07.2019

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Patent

Multi-level staggered terminal structure and semiconductor package and assembly using the same

Multi-level staggered terminal structure and semiconductor package and assembly using the same

by WANG, CHIAUNG, LIN, CHARLES W. C
Year of Publication 01.04.2024

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Patent

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