105 nm Gate length pMOSFETs with high-K and metal gate fabricated in a Si process line on 200 mm GeOI wafers
LE RAYER, C, CLAVELIER, L, LE CARVAL, G, TRUCHE, R, POUYDEBASQUE, A, VINET, M, DELEONIBUS, S, TABONE, C, ROMANJEK, K, DEGUET, C, SANCHEZ, L, HARTMANN, J.-M, ROURE, M.-C, GRAMPEIX, H, SOLIVERES, S
Published in Solid-state electronics (01.09.2008)
Published in Solid-state electronics (01.09.2008)
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