A 65-dB-SNDR Pipelined SAR ADC Using PVT-Robust Capacitively Degenerated Dynamic Amplifier
Yoon, Hyunchul, Lee, Changuk, Kim, Taewoong, Kwon, Yigi, Chae, Youngcheol
Published in IEEE journal of solid-state circuits (01.04.2023)
Published in IEEE journal of solid-state circuits (01.04.2023)
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Journal Article
A 13b 40MS/s SAR ADC with Robust kT/C Noise Cancellation using a Feedback Auxiliary Amplifier
Won, Jongyoon, Son, Byeongjin, Kwon, Yigi, Yoon, Junghyun, Chae, Youngcheol
Published in 2024 IEEE European Solid-State Electronics Research Conference (ESSERC) (09.09.2024)
Published in 2024 IEEE European Solid-State Electronics Research Conference (ESSERC) (09.09.2024)
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Conference Proceeding
A 50 MS/s 65 dB-SNDR Pipelined SAR ADC using Capacitively Degenerated Two-Stage Dynamic Amplifier
Yoon, Hyunchul, Kim, Teawoong, Kwon, Yigi, Chae, Youngcheol
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
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Conference Proceeding
An 8.1 ENOB 10bit 400MS/s Pipelined ADC Using SAR and Sub-Ranging Flash
Kwon, Yigi, Min, Byounghan, Lee, Jinhwan, Lee, Wooyol, Yang, Sunghyun
Published in 2021 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2021)
Published in 2021 IEEE International Symposium on Circuits and Systems (ISCAS) (01.05.2021)
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Conference Proceeding
An 11bit 360MS/s Pipelined SAR ADC with Dynamic Negative-C Assisted Residue Amplifier
Kwon, Yigi, Lee, Sangwoo, Lee, Changuk, Yoon, Hyunchul, Min, Byounghan, Chae, Youngcheol
Published in 2023 IEEE Asian Solid-State Circuits Conference (A-SSCC) (05.11.2023)
Published in 2023 IEEE Asian Solid-State Circuits Conference (A-SSCC) (05.11.2023)
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Conference Proceeding