Scalability of Extremely Thin SOI (ETSOI) MOSFETs to Sub-20-nm Gate Length
Khakifirooz, A., Kangguo Cheng, Reznicek, A., Adam, T., Loubet, N., Hong He, Kuss, J., Juntao Li, Kulkarni, P., Ponoth, S., Sreenivasan, R., Qing Liu, Doris, B., Shahidi, G.
Published in IEEE electron device letters (01.02.2012)
Published in IEEE electron device letters (01.02.2012)
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Journal Article
Aggressively Scaled Strained-Silicon-on-Insulator Undoped-Body High- \kappa/Metal-Gate nFinFETs for High-Performance Logic Applications
Maitra, K, Khakifirooz, A, Kulkarni, P, Basker, V S, Faltermeier, J, Jagannathan, H, Adhikari, H, Chun-Chen Yeh, Klymko, N R, Saenger, K, Standaert, T, Miller, R J, Doris, B, Paruchuri, V K, McHerron, D, O'Neil, J, Leobundung, E, Huiming Bu
Published in IEEE electron device letters (01.06.2011)
Published in IEEE electron device letters (01.06.2011)
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Journal Article
High-Performance Partially Depleted SOI PFETs With In Situ Doped SiGe Raised Source/Drain and Implant-Free Extension
Khakifirooz, Ali, Kangguo Cheng, Jin Cai, Kimball, Anne, Kulkarni, Pranita, Reznicek, Alexander, Adam, Thomas, Edge, Lisa, Huiming Bu, Doris, Bruce, Shahidi, Ghavam
Published in IEEE electron device letters (01.03.2011)
Published in IEEE electron device letters (01.03.2011)
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Journal Article
A Comparison of Short-Channel Control in Planar Bulk and Fully Depleted Devices
Muralidhar, R., Jin Cai, Lauer, I., Chan, K., Kulkarni, P., Young-Hee Kim, Zhibin Ren, Dae-Gyu Park, Oldiges, P., Shahidi, G.
Published in IEEE electron device letters (01.06.2012)
Published in IEEE electron device letters (01.06.2012)
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Journal Article
Extraction of Effective Oxide Thickness for SOI FINFETs With High- \kappa/Metal Gates Using the Body Effect
Paul, Sujata, Yeh, Frank, Maitra, Kingsuk, Chung-Hsun Lin, Kerber, Andreas, Kulkarni, Pranita, Jagannathan, Hemanth, Basker, Veeraraghavan S, Miller, Robert J, Huiming Bu
Published in IEEE electron device letters (01.07.2010)
Published in IEEE electron device letters (01.07.2010)
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Journal Article
Extraction of Effective Oxide Thickness for SOI FINFETs With High- [Formula Omitted]/Metal Gates Using the Body Effect
Paul, Sujata, Yeh, Frank, Maitra, Kingsuk, Lin, Chung-Hsun, Kerber, Andreas, Kulkarni, Pranita, Jagannathan, Hemanth, Basker, Veeraraghavan S, Miller, Robert J, Bu, Huiming
Published in IEEE electron device letters (01.07.2010)
Published in IEEE electron device letters (01.07.2010)
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Journal Article
Aggressively Scaled Strained-Silicon-on-Insulator Undoped-Body High- [Formula Omitted]/Metal-Gate nFinFETs for High-Performance Logic Applications
Maitra, Kingsuk, Khakifirooz, Ali, Kulkarni, Pranita, Basker, Veeraraghavan S, Faltermeier, Jonathan, Jagannathan, Hemanth, Adhikari, Hemant, Yeh, Chun-Chen, Klymko, Nancy R, Saenger, Katherine, Standaert, Theodorus, Miller, Robert J, Doris, Bruce, Paruchuri, Vamsi K, McHerron, Dale, O'Neil, James, Leobundung, Effendi, Bu, Huiming
Published in IEEE electron device letters (01.06.2011)
Published in IEEE electron device letters (01.06.2011)
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Journal Article
(Invited) Strain Engineering for Fully-Depleted SOI Devices
Khakifirooz, Ali, Kulkarni, Pranita, Bedell, Stephen, Cheng, Kangguo, Sadana, Devendra K., Doris, Bruce, Shahidi, Ghavam
Published in ECS transactions (01.01.2010)
Published in ECS transactions (01.01.2010)
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Journal Article
Fully depleted extremely thin SOI for mainstream 20nm low-power technology and beyond
Khakifirooz, A., Kangguo Cheng, Jagannathan, B., Kulkarni, P., Sleight, J.W., Shahrjerdi, D., Chang, J.B., Sungjae Lee, Junjun Li, Huiming Bu, Gauthier, R., Doris, B., Shahidi, G.
Published in 2010 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2010)
Published in 2010 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2010)
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Conference Proceeding
TCAD study of back-gate biasing in UTBB
Hook, T. B., Furkay, S., Kulkarni, P., Monsieur, F.
Published in IEEE 2011 International SOI Conference (01.10.2011)
Published in IEEE 2011 International SOI Conference (01.10.2011)
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Conference Proceeding
Challenges and Solutions of Extremely Thin SOI (ETSOI) for CMOS Scaling to 22nm Node and Beyond
Cheng, Kangguo, Khakifirooz, Ali, Kulkarni, Pranita, Edge, Lisa F., Reznicek, Alexander, Adam, Thomas, He, Hong, Seo, Soon-cheon, Kanakasabapathy, Sivananda, Schmitz, Stefan, Holmes, Steven, Johnson, Richard, Zhu, Yu, Demarest, James, Sadana, Devendra, Bu, Huiming, Doris, Bruce, Shahidi, Ghavam
Published in ECS transactions (01.01.2010)
Published in ECS transactions (01.01.2010)
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Journal Article
Opportunities and Challenges of FinFET as a Device Structure Candidate for 14nm Node CMOS Technology
Yamashita, Tenko, Basker, Veeraraghavan, Standaert, Theodorus, Yeh, Chun-Chen, Faltermeier, Johnathan, Yamamoto, Toyoji, Lin, Chung-hsun, Bryant, Andres, Maitra, Kingsuk, Kulkarni, Pranita, Kanakasabapathy, Sivananda, Sunamura, Hiroshi, Wang, Junli, Jagannathan, Hemanth, Inada, Atsuro, Cho, Jin, Miller, Robert, Doris, Bruce, Paruchuri, Vamsi, Bu, Huiming, Khare, Mukesh, O'Neill, James, Leobandung, Effendi
Published in ECS transactions (01.01.2011)
Published in ECS transactions (01.01.2011)
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Journal Article
Ultra-Thin Body and BOX (UTBB) Device for Aggressive Scaling of CMOS Technology
Liu, Qing, Yagishita, Atsushi, Kumar, Arvind, Loubet, Nicolas, Yamamoto, Toyoji, Kulkarni, Pranita, Monsieur, Frederic, Khakifirooz, Ali, Ponoth, Shom, Cheng, Kangguo, Haran, Bala, Vinet, Maud, Cai, Jin, Khare, Prasanna, Monfray, Stephane, Boeuf, Frederic, Mehta, Sanjay, Kuss, James, Leobandung, Effendi, Hane, Masami, Bu, Huiming, Ishimaru, Kazunari, Skotnicki, Thomas, Kleemeier, Walter, Takayanagi, Mariko, Hook, Terence, Khare, Mukesh, Luning, Scott, Doris, Bruce, Sampson, Ron
Published in ECS transactions (01.01.2011)
Published in ECS transactions (01.01.2011)
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Journal Article
HOT-carrier degradation in undoped-body ETSOI FETS and SOI FINFETS
Miaomiao Wang, Kulkarni, Pranita, Kangguo Cheng, Khakifirooz, Ali, Basker, V S, Jagannathan, Hemanth, Chun-Chen Yeh, Paruchuri, Vamsi, Doris, Bruce, Huiming Bu, Chung-Hsun Lin, Stathis, James H, Maitra, Kingsuk, Oldiges, Philip J
Published in 2010 IEEE International Reliability Physics Symposium (01.05.2010)
Published in 2010 IEEE International Reliability Physics Symposium (01.05.2010)
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Conference Proceeding
TRANSISTOR, VERFAHREN ZUR HERSTELLUNG EINES TRANSISTORS UND VERFAHREN ZURVERRINGERUNG DER PARASITÄREN KAPAZITÄT IN EINEM MULTI-GATE-FELDEFFEKTTRANSISTOR
Standaert, Theodorus E, Kulkarni, Pranita, Ando, Takashi, Chang, Josephine B, Kanakasabapathy, Sivananda K, Yamashita, Tenko
Year of Publication 02.05.2024
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Year of Publication 02.05.2024
Patent
Methods of forming a semiconductor device with a protected gate cap layer and the resulting device
PHAM DANIEL, PRANATHARTHIHARAN BALASUBRAMANIAN, CAI XIUYU, KULKARNI PRANITA
Year of Publication 16.02.2016
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Year of Publication 16.02.2016
Patent