16.4 High-Density and Low-Power PUF Designs in 5nm Achieving 23× and 39× BER Reduction After Unstable Bit Detection and Masking
Kudva, Sudhir Shrikantha, Sinangil, Mahmut Ersin, Tell, Stephen, Nedovic, Nikola, Song, Sanquan, Zimmer, Brian, Gray, C. Thomas
Published in 2024 IEEE International Solid-State Circuits Conference (ISSCC) (18.02.2024)
Published in 2024 IEEE International Solid-State Circuits Conference (ISSCC) (18.02.2024)
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Conference Proceeding
PHYSICALLY UNCLONABLE CELL USING DUAL-INTERLOCKING AND ERROR CORRECTION TECHNIQUES
Sinangil, Mahmut Ersin, Nedovic, Nikola, Kudva, Sudhir Shrikantha, Gray, Carl Thomas
Year of Publication 16.05.2024
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Year of Publication 16.05.2024
Patent
Detection and mitigation of unstable cells in unclonable cell array
Tell, Stephen G, Nedovic, Nikola, Kudva, Sudhir Shrikantha, Gray, Carl Thomas
Year of Publication 10.10.2023
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Year of Publication 10.10.2023
Patent
DETECTION AND MITIGATION OF UNSTABLE CELLS IN UNCLONABLE CELL ARRAY
Tell, Stephen G, Nedovic, Nikola, Kudva, Sudhir Shrikantha, Gray, Carl Thomas
Year of Publication 25.08.2022
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Year of Publication 25.08.2022
Patent
Switched tank-transformer based high step-down ratio DC-DC converter
Poulton, John, Abou-Alfotouh, Ahmed, Nedovic, Nikola, Kudva, Sudhir Shrikantha
Year of Publication 24.03.2020
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Year of Publication 24.03.2020
Patent
Magnetic power coupling to an integrated circuit module
Dally, William J, Kudva, Sudhir Shrikantha, Greer, III, Thomas Hastings
Year of Publication 23.07.2019
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Year of Publication 23.07.2019
Patent