A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing
Bhavnagarwala, A.J., Kosonocky, S., Radens, C., Yuen Chan, Stawiasz, K., Srinivasan, U., Kowalczyk, S.P., Ziegler, M.M.
Published in IEEE journal of solid-state circuits (01.04.2008)
Published in IEEE journal of solid-state circuits (01.04.2008)
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On-chip synchronous communication between clock domains with quotient frequencies
SATHE, V, PAPAEFTHYMIOU, M. C, KOSONOCKY, S. V, KIM, S
Published in Electronics letters (26.04.2007)
Published in Electronics letters (26.04.2007)
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Low-power circuits and technology for wireless digital systems
Kosonocky, Stephen V, Bhavnagarwala, Azeez J, Chin, Kenneth, Gristede, George D
Published in IBM journal of research and development (01.03.2003)
Published in IBM journal of research and development (01.03.2003)
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An x86-64 Core in 32 nm SOI CMOS
Jotwani, R, Sundaram, S, Kosonocky, S, Schaefer, A, Andrade, V F, Novak, A, Naffziger, S
Published in IEEE journal of solid-state circuits (01.01.2011)
Published in IEEE journal of solid-state circuits (01.01.2011)
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An eight-issue tree-VLIW processor for dynamic binary translation
Ebcioglu, K., Fritts, J., Kosonocky, S., Gschwind, M., Altman, E., Kailas, K., Bright, T.
Published in Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273) (1998)
Published in Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273) (1998)
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An x86-64 core implemented in 32nm SOI CMOS
Jotwani, R., Sundaram, S., Kosonocky, S., Schaefer, A., Andrade, V., Constant, G., Novak, A., Naffziger, S.
Published in 2010 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2010)
Published in 2010 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2010)
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Designing in scaled technologies: 32 nm and beyond
Kosonocky, S., Burd, T., Kasprak, K., Schultz, R., Stephany, R.
Published in 2012 Symposium on VLSI Technology (VLSIT) (01.06.2012)
Published in 2012 Symposium on VLSI Technology (VLSIT) (01.06.2012)
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Power/performance optimization of many-core processor SoCs
Kosonocky, S., Stojanovic, V., Van Berkel, K., Chao, M., Knoll, T., Friedrich, J.
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
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Conference Proceeding
Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI design
Chen, W., Hwang, W., Kudva, R., Gristede, G.D., Kosonocky, S., Joshi, R.V.
Published in ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581) (2001)
Published in ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581) (2001)
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Conference Proceeding
A synchronous interface for SoCs with multiple clock domains
Sathe, V., Ziesler, C., Papaefihymiou, M., Kinfl, S., Kosonocky, S.
Published in IEEE International SOC Conference, 2004. Proceedings (2004)
Published in IEEE International SOC Conference, 2004. Proceedings (2004)
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Conference Proceeding
Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI design
Chen, W., Hwang, W., Kudva, P., Gristede, G., Kosonocky, S., Joshi, R.
Published in International Symposium on Low Power Electronics and Design: Proceedings of the 2001 international symposium on Low power electronics and design (06.08.2001)
Published in International Symposium on Low Power Electronics and Design: Proceedings of the 2001 international symposium on Low power electronics and design (06.08.2001)
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Conference Proceeding
Keeping hot chips cool: are IC thermal problems hot air?
Puri, Ruchir, Varma, Devadas, Edwards, Darvin, Weger, Alan J, Franzon, Paul, Yang, Andrew, Kosonocky, Stephen
Published in 2008 45th ACM/IEEE Design Automation Conference (08.06.2008)
Published in 2008 45th ACM/IEEE Design Automation Conference (08.06.2008)
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Conference Proceeding
Fluctuation limits & scaling opportunities for CMOS SRAM cells
Bhavnagarwala, A., Kosonocky, S., Radens, C., Stawiasz, K., Mann, R., Qiuyi Ye, Ken Chin
Published in IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest (2005)
Published in IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest (2005)
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