A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology
Cernea, R.-A., Long Pham, Moogat, F., Siu Chan, Binh Le, Yan Li, Shouchang Tsao, Tai-Yuan Tseng, Khanh Nguyen, Li, J., Jayson Hu, Jong Hak Yuh, Hsu, C., Fanglin Zhang, Kamei, T., Nasu, H., Kliza, P., Khin Htoo, Lutze, J., Yingda Dong, Higashitani, M., Junnhui Yang, Hung-Szu Lin, Sakhamuri, V., Li, A., Feng Pan, Yadala, S., Taigor, S., Pradhan, K., Lan, J., James Chan, Abe, T., Fukuda, Y., Mukai, H., Kawakami, K., Liang, C., Ip, T., Shu-Fen Chang, Lakshmipathi, J., Huynh, S., Pantelakis, D., Mofidi, M., Quader, K.
Published in IEEE journal of solid-state circuits (01.01.2009)
Published in IEEE journal of solid-state circuits (01.01.2009)
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Conference Proceeding
A 16 Gb 3-Bit Per Cell (X3) NAND Flash Memory on 56 nm Technology With 8 MB/s Write Rate
Yan Li, Seungpil Lee, Yupin Fong, Feng Pan, Tien-Chien Kuo, Jongmin Park, Samaddar, T., Hao Thai Nguyen, Mui, M.L., Htoo, K., Kamei, T., Higashitani, M., Yero, E., Gyuwan Kwon, Kliza, P., Jun Wan, Kaneko, T., Maejima, H., Shiga, H., Hamada, M., Fujita, N., Kanebako, K., Tam, E., Koh, A., Lu, I., Kuo, C.C.-H., Pham, T., Huynh, J., Qui Nguyen, Chibvongodze, H., Watanabe, M., Oowada, K., Shah, G., Woo, B., Gao, R., Chan, J., Lan, J., Hong, P., Liping Peng, Das, D., Ghosh, D., Kalluru, V., Kulkarni, S., Cernea, R.-A., Huynh, S., Pantelakis, D., Chi-Ming Wang, Quader, K.
Published in IEEE journal of solid-state circuits (01.01.2009)
Published in IEEE journal of solid-state circuits (01.01.2009)
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Journal Article
Conference Proceeding
Ring Oscillator Aging Characterization in Conventional CMOS Technologies
Kerber, Andreas, Kliza, Phil, Beckmeier, Daniel, Ravindranath, Abhimanyu, Yuan, Luo, Liu, Yun, Jungroth, Owen W.
Published in 2023 37th Symposium on Microelectronics Technology and Devices (SBMicro) (28.08.2023)
Published in 2023 37th Symposium on Microelectronics Technology and Devices (SBMicro) (28.08.2023)
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Conference Proceeding
A 16Gb 3b/ Cell NAND Flash Memory in 56nm with 8MB/s Write Rate
Li, Yan, Lee, Seungpil, Fong, Yupin, Pan, Feng, Kuo, Tien-Chien, Park, Jong, Samaddar, Tapan, Nguyen, Hao, Mui, Man, Htoo, Khin, Kamei, Teruhiko, Higashitani, Masaaki, Yero, Emilio, Kwon, Gyuwan, Kliza, Phil, Wan, Jun, Kaneko, Tetsuya, Maejima, Hiroshi, Shiga, Hitoshi, Hamada, Makoto, Fujita, Norihiro, Kanebako, Kazunori, Tam, Eugene, Koh, Anne, Lu, Iris, Kuo, Calvin, Pham, Trung, Huynh, Jonathan, Nguyen, Qui, Chibvongodze, Hardwell, Watanabe, Mitsuyuki, Oowada, Ken, Shah, Grishma, Woo, Byungki, Gao, Ray, Chan, James, Lan, James, Hong, Patrick, Peng, Liping, Das, Debi, Ghosh, Dhritiman, Kalluru, Vivek, Kulkarni, Sanjay, Cernea, Raul, Huynh, Sharon, Pantelakis, Dimitris, Wang, Chi-Ming, Quader, Khandker
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
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Conference Proceeding
A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm
Cernea, Raul, Pham, Long, Moogat, Farookh, Chan, Siu, Le, Binh, Li, Yan, Tsao, Shouchang, Tseng, Tai-Yuan, Nguyen, Khanh, Li, Jason, Hu, Jayson, Park, Jong, Hsu, Cynthia, Zhang, Fanglin, Kamei, Teruhiko, Nasu, Hiroaki, Kliza, Phil, Htoo, Khin, Lutze, Jeffrey, Dong, Yingda, Higashitani, Masaaki, Yang, Junhui, Lin, Hung-Szu, Sakhamuri, Vamshi, Li, Alan, Pan, Feng, Yadala, Sridhar, Taigor, Subodh, Pradhan, Kishan, Lan, James, Chan, James, Abe, Takumi, Fukuda, Yasuyuki, Mukai, Hideo, Kawakami, Koichi, Liang, Connie, Ip, Tommy, Chang, Shu-Fen, Lakshmipathi, Jaggi, Huynh, Sharon, Pantelakis, Dimitris, Mofidi, Mehrdad, Quader, Khandker
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
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Conference Proceeding