A graph placement methodology for fast chip design
Mirhoseini, Azalia, Goldie, Anna, Yazgan, Mustafa, Jiang, Joe Wenjie, Songhori, Ebrahim, Wang, Shen, Lee, Young-Joon, Johnson, Eric, Pathak, Omkar, Nova, Azade, Pak, Jiwoo, Tong, Andy, Srinivasa, Kavya, Hang, William, Tuncer, Emre, Le, Quoc V., Laudon, James, Ho, Richard, Carpenter, Roger, Dean, Jeff
Published in Nature (London) (10.06.2021)
Published in Nature (London) (10.06.2021)
Get full text
Journal Article
Addendum: A graph placement methodology for fast chip design
Goldie, Anna, Mirhoseini, Azalia, Yazgan, Mustafa, Jiang, Joe Wenjie, Songhori, Ebrahim, Wang, Shen, Lee, Young-Joon, Johnson, Eric, Pathak, Omkar, Nova, Azade, Pak, Jiwoo, Tong, Andy, Srinivasa, Kavya, Hang, William, Tuncer, Emre, Le, Quoc V., Laudon, James, Ho, Richard, Carpenter, Roger, Dean, Jeff
Published in Nature (London) (26.09.2024)
Published in Nature (London) (26.09.2024)
Get full text
Journal Article
Author Correction: A graph placement methodology for fast chip design
Mirhoseini, Azalia, Goldie, Anna, Yazgan, Mustafa, Jiang, Joe Wenjie, Songhori, Ebrahim, Wang, Shen, Lee, Young-Joon, Johnson, Eric, Pathak, Omkar, Nova, Azade, Pak, Jiwoo, Tong, Andy, Srinivasa, Kavya, Hang, William, Tuncer, Emre, Le, Quoc V., Laudon, James, Ho, Richard, Carpenter, Roger, Dean, Jeff
Published in Nature (London) (21.04.2022)
Published in Nature (London) (21.04.2022)
Get full text
Journal Article
Chip Placement with Deep Reinforcement Learning
Mirhoseini, Azalia, Goldie, Anna, Yazgan, Mustafa, Jiang, Joe, Songhori, Ebrahim, Wang, Shen, Lee, Young-Joon, Johnson, Eric, Pathak, Omkar, Bae, Sungmin, Nazi, Azade, Pak, Jiwoo, Tong, Andy, Srinivasa, Kavya, Hang, William, Tuncer, Emre, Babu, Anand, Le, Quoc V, Laudon, James, Ho, Richard, Carpenter, Roger, Dean, Jeff
Year of Publication 22.04.2020
Year of Publication 22.04.2020
Get full text
Journal Article
Chip Placement with Deep Reinforcement Learning
Mirhoseini, Azalia, Goldie, Anna, Yazgan, Mustafa, Jiang, Joe, Songhori, Ebrahim, Wang, Shen, Young-Joon, Lee, Johnson, Eric, Pathak, Omkar, Bae, Sungmin, Nazi, Azade, Pak, Jiwoo, Tong, Andy, Kavya Srinivasa, Hang, William, Tuncer, Emre, Babu, Anand, Le, Quoc V, Laudon, James, Ho, Richard, Carpenter, Roger, Dean, Jeff
Published in arXiv.org (22.04.2020)
Get full text
Published in arXiv.org (22.04.2020)
Paper
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
Carpenter, Roger David, Pathak, Omkar, Jiang, Wenjie, Yazgan, Mustafa Nazim, Ho, Chian-min Richard, Le, Quoc V, Goldie, Anna Darling, Wang, Shen, Srinivasa Setty, Kavya, Laudon, James, Lee, Young-Joon, Songhori, Ebrahim, Mirhoseini, Azalia, Dean, Jeffrey Adgate
Year of Publication 25.07.2024
Get full text
Year of Publication 25.07.2024
Patent
Generating integrated circuit placements using neural networks
Carpenter, Roger David, Pathak, Omkar, Jiang, Wenjie, Yazgan, Mustafa Nazim, Ho, Chian-min Richard, Le, Quoc V, Goldie, Anna Darling, Wang, Shen, Srinivasa Setty, Kavya, Laudon, James, Lee, Young-Joon, Songhori, Ebrahim, Mirhoseini, Azalia, Dean, Jeffrey Adgate
Year of Publication 26.12.2023
Get full text
Year of Publication 26.12.2023
Patent
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
Carpenter, Roger David, Pathak, Omkar, Jiang, Wenjie, Yazgan, Mustafa Nazim, Ho, Chian-min Richard, Le, Quoc V, Goldie, Anna Darling, Wang, Shen, Srinivasa Setty, Kavya, Laudon, James, Lee, Young-Joon, Songhori, Ebrahim, Mirhoseini, Azalia, Dean, Jeffrey Adgate
Year of Publication 20.04.2023
Get full text
Year of Publication 20.04.2023
Patent
Generating integrated circuit placements using neural networks
Carpenter, Roger David, Pathak, Omkar, Jiang, Wenjie, Yazgan, Mustafa Nazim, Ho, Chian-min Richard, Le, Quoc V, Goldie, Anna Darling, Wang, Shen, Srinivasa Setty, Kavya, Laudon, James, Lee, Young-Joon, Songhori, Ebrahim, Mirhoseini, Azalia, Dean, Jeffrey Adgate
Year of Publication 17.01.2023
Get full text
Year of Publication 17.01.2023
Patent
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
JIANG, Wenjie, WANG, Shen, SONGHORI, Ebrahim, LAUDON, James, CARPENTER, Roger David, SRINIVASA SETTY, Kavya, DEAN, Jeffrey Adgate, MIRHOSEINI, Azalia, LEE, Young-Joon, YAZGAN, Mustafa Nazim, GOLDIE, Anna Darling, PATHAK, Omkar, HO, Chian-min Richard, LE, Quoc V
Year of Publication 07.12.2022
Get full text
Year of Publication 07.12.2022
Patent
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
Carpenter, Roger David, Pathak, Omkar, Jiang, Wenjie, Yazgan, Mustafa Nazim, Ho, Chian-min Richard, Le, Quoc V, Goldie, Anna Darling, Wang, Shen, Srinivasa Setty, Kavya, Laudon, James, Lee, Young-Joon, Songhori, Ebrahim, Mirhoseini, Azalia, Dean, Jeffrey Adgate
Year of Publication 07.04.2022
Get full text
Year of Publication 07.04.2022
Patent
Generating integrated circuit placements using neural networks
Carpenter, Roger David, Ho, Chian-Min Richard, Pathak, Omkar, Jiang, Wenjie, Yazgan, Mustafa Nazim, Le, Quoc V, Goldie, Anna Darling, Wang, Shen, Srinivasa Setty, Kavya, Laudon, James, Lee, Young-Joon, Songhori, Ebrahim, Mirhoseini, Azalia, Dean, Jeffrey Adgate
Year of Publication 04.01.2022
Get full text
Year of Publication 04.01.2022
Patent
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
Carpenter, Roger David, Pathak, Omkar, Jiang, Wenjie, Yazgan, Mustafa Nazim, Ho, Chian-min Richard, Le, Quoc V, Goldie, Anna Darling, Wang, Shen, Srinivasa Setty, Kavya, Laudon, James, Lee, Young-Joon, Songhori, Ebrahim, Mirhoseini, Azalia, Dean, Jeffrey Adgate
Year of Publication 28.10.2021
Get full text
Year of Publication 28.10.2021
Patent