Time-differential sense amplifier for sub-80mV bitline voltage embedded STT-MRAM in 40nm CMOS
Jefremow, M., Kern, T., Allers, W., Peters, C., Otterstedt, J., Bahlous, O., Hofmann, K., Allinger, R., Kassenetter, S., Schmitt-Landsiedel, D.
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
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Conference Proceeding
Bitline-capacitance-cancelation sensing scheme with 11ns read latency and maximum read throughput of 2.9GB/s in 65nm embedded flash for automotive
Jefremow, M., Kern, T., Backhausen, U., Peters, C., Parzinger, C., Roll, C., Kassenetter, S., Thierold, S., Schmitt-Landsiedel, D.
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
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Conference Proceeding
A 65nm 4MB embedded flash macro for automotive achieving a read throughput of 5.7GB/s and a write throughput of 1.4MB/s
Jefremow, M., Kern, T., Backhausen, U., Elbs, J., Rousseau, B., Roll, C., Castro, L., Roehr, T., Paparisto, E., Herfurth, K., Bartenschlager, R., Thierold, S., Renardy, R., Kassenetter, S., Lawal, N., Strasser, M., Trottmann, W., Schmitt-Landsiedel, D.
Published in 2013 Proceedings of the ESSCIRC (ESSCIRC) (01.09.2013)
Published in 2013 Proceedings of the ESSCIRC (ESSCIRC) (01.09.2013)
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Conference Proceeding