by Kobashi, S, Kamiura, N, Hata, Y, Miyawaki, F
Published in Image and vision computing (01.03.2001)

by Kamiura, N., Fukuda, T., Saitoh, A., Isokawa, T., Matsui, N., Tabuchi, H.
Published in 2013 IEEE 43rd International Symposium on Multiple-Valued Logic (01.05.2013)

by Kamiura, N., Ohtsuka, A., Tanii, H., Isokawa, T., Matsui, N.
Published in 2005 IEEE International Conference on Systems, Man and Cybernetics (2005)

by Kamiura, N., Isokawa, T., Matsui, N.
Published in 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings (2004)

by Kamiura, N., Isokawa, T., Matsui, N.
Published in 13th Asian Test Symposium (2004)

by Kamiura, N., Taniguchi, Y., Matsui, N.
Published in Proceedings / International Symposium on Multiple-Valued Logic (2001)

by Kamiura, N., Isokawa, T., Matsui, N.
Published in Proceedings - International Symposium on Multiple-Valued Logic (2002)

by Kamiura, N., Taniguchi, Y., Isokawa, T., Matsui, N.
Published in Proceedings - Asian Test Symposium (2001)

by Isokawa, Teijiro, Nishimura, Haruhiko, Kamiura, Naotake, Matsui, Nobuyuki
Published in International journal of neural systems (01.04.2008)

by Kamiura, N., Kodera, T., Matsui, N.
Published in Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (2000)

by Kamiura, N., Hata, Y., Matsui, N.
Published in Proceedings / International Symposium on Multiple-Valued Logic (2000)

by Kamiura, N., Kodera, T., Matsui, N.
Published in Proceedings - Asian Test Symposium (2000)

by Kamiura, N., Tomita, M., Isokawa, T., Matsui, N.
Published in Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (2001)

by Kamiura, N., Hata, Y., Yamato, K.
Published in Proceedings / International Symposium on Multiple-Valued Logic (1998)

by Hata, Y., Kobashi, S., Kamiura, N., Kitamuta, Y., Yanagida, T.
Published in PROC INT SYMP MULT VALUED LOGIC (2000)

by Hata, Y., Kamiura, N., Yamato, K.
Published in Proceedings / International Symposium on Multiple-Valued Logic (1997)

by Utsumi, T., Kamiura, N., Hata, Y., Yamato, K.
Published in Proceedings / International Symposium on Multiple-Valued Logic (1997)

by Nakano, S., Kamiura, N., Hata, Y.
Published in Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) (1998)

by Hata, Y., Hayase, K., Hozumi, T., Kamiura, N., Yamato, K.
Published in Proceedings / International Symposium on Multiple-Valued Logic (1997)

by Hata, Y., Kamiura, N., Yamato, K.
Published in Proceedings 25th International Symposium on Multiple-Valued Logic (1995)