A Formal Approach to Accountability in Heterogeneous Systems-on-Chip
Kalayappan, Rajshekar, Sarangi, Smruti R.
Published in IEEE transactions on dependable and secure computing (01.11.2021)
Published in IEEE transactions on dependable and secure computing (01.11.2021)
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Journal Article
SANNA: Secure Acceleration of Neural Network Applications
Poptani, Akash, Mittal, Abhishek, Saiya, Rishit, Kalayappan, Rajshekar, Chandran, Sandeep
Published in 2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID) (01.01.2023)
Published in 2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID) (01.01.2023)
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Conference Proceeding
A hardware implementation of the MCAS synchronization primitive
Patel, Srishty, Kalayappan, Rajshekar, Mahajan, Ishani, Sarangi, Smruti R.
Published in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 (01.03.2017)
Published in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 (01.03.2017)
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Conference Proceeding
Surveillance using non-stealthy sensors: A new intruder model
Bagchi, Amitabha, Kalayappan, Rajshekar, Sankhla, Surabhi
Published in Security and communication networks (01.11.2014)
Published in Security and communication networks (01.11.2014)
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Journal Article
On Decomposing Complex Test Cases for Efficient Post-silicon Validation
Harshitha, C, Harikrishna, Sundarapalli, Rohith, Peddakotla, Chandran, Sandeep, Kalayappan, Rajshekar
Published in 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC) (22.01.2024)
Published in 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC) (22.01.2024)
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Conference Proceeding
SecCheck: A Trustworthy System with Untrusted Components
Kalayappan, Rajshekar, Sarangi, Smruti R.
Published in 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (01.07.2016)
Published in 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (01.07.2016)
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Conference Proceeding
Tejas: A java based versatile micro-architectural simulator
Sarangi, Smruti R., Kalayappan, Rajshekar, Kallurkar, Prathmesh, Goel, Seep, Peter, Eldhose
Published in 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (01.09.2015)
Published in 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) (01.09.2015)
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Conference Proceeding
SecX: A Framework for Collecting Runtime Statistics for SoCs with Multiple Accelerators
Kalayappan, Rajshekar, Sarangi, Smruti R.
Published in 2015 IEEE Computer Society Annual Symposium on VLSI (01.07.2015)
Published in 2015 IEEE Computer Society Annual Symposium on VLSI (01.07.2015)
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Conference Proceeding
Tejas Simulator : Validation against Hardware
Sarangi, Smruti R, Kalayappan, Rajshekar, Kallurkar, Prathmesh, Goel, Seep
Year of Publication 29.01.2015
Year of Publication 29.01.2015
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Journal Article
Tejas Simulator : Validation against Hardware
Sarangi, Smruti R, Kalayappan, Rajshekar, Kallurkar, Prathmesh, Goel, Seep
Published in arXiv.org (29.01.2015)
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Published in arXiv.org (29.01.2015)
Paper