Search Results - "Kalandar Navas Khan Oratti" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Impact of Packaging Design on Reliability of Large Die Cu/Low-[Formula Omitted] (BD) Interconnect

Impact of Packaging Design on Reliability of Large Die Cu/Low-[Formula Omitted] (BD) Interconnect

by Chai, Tai Chong, Zhang, Xiaowu, Li, Hong Yu, Sekhar, Vasarla Nagendra, Khan, Oratti Kalandar Navas, Lau, John, Murthy, Ramana, Tan, Yeow Meng, Cheng, Chek Kweng, Liew, Siao Li, Chi, Dongzhi
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01.05.2012)

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Journal Article

$Impact of Packaging Design on Reliability of Large Die Cu/Low- \kappa (BD) Interconnect$

Impact of Packaging Design on Reliability of Large Die Cu/Low- \kappa (BD) Interconnect

by Chai, T. C., Zhang, X., Li, H. Y., Sekhar, V. N., Khan, O. K. N., Lau, J., Murthy, R., Yeow Meng Tan, Cheng, C. K., Siao Li Liew, Dongzhi Chi
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01.05.2012)

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Journal Article

FLIP CHIP PACKAGE AND METHOD FOR FABRICATING A FLIP CHIP PACKAGE

FLIP CHIP PACKAGE AND METHOD FOR FABRICATING A FLIP CHIP PACKAGE

by ORATTI KALANDAR, Navas Khan, SORIC, Mario, RAU, Ingolf, V C MUNIANDY, Kesvakumar, KIM, Do Hyung, MIRANDA, Ariel Lizaba
Year of Publication 20.07.2023

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Patent

FLIP CHIP PACKAGE AND METHOD FOR FABRICATING A FLIP CHIP PACKAGE

FLIP CHIP PACKAGE AND METHOD FOR FABRICATING A FLIP CHIP PACKAGE

by ORATTI KALANDAR, Navas Khan, SORIC, Mario, RAU, Ingolf, V C MUNIANDY, Kesvakumar, KIM, Do Hyung, MIRANDA, Ariel Lizaba
Year of Publication 13.04.2023

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Patent

Semiconductor device having a copper pillar interconnect structure

Semiconductor device having a copper pillar interconnect structure

by Marbella, Carlo, Chan, Swee Guan, Cho, Eung San, Oratti Kalandar, Navas Khan
Year of Publication 19.10.2021

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Patent

SELECTIVELY SHIELDED SEMICONDUCTOR PACKAGE

SELECTIVELY SHIELDED SEMICONDUCTOR PACKAGE

by Oratti Kalandar, Navas Khan, Lakhera, Nishant, SINGH, Akhilesh Kumar
Year of Publication 04.04.2019

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Patent

Apparatus and methods for multi-die packaging

Apparatus and methods for multi-die packaging

by Kalandar, Navas Khan Oratti, Singh, Akhilesh K, Lakhera, Nishant
Year of Publication 19.02.2019

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Patent

Wafer level chip scale package with encapsulant

Wafer level chip scale package with encapsulant

by Oratti Kalandar, Navas Khan, Singh, Akhilesh K, Lakhera, Nishant
Year of Publication 04.12.2018

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Patent

Semiconductor Device Having a Copper Pillar Interconnect Structure

Semiconductor Device Having a Copper Pillar Interconnect Structure

by Marbella, Carlo, Chan, Swee Guan, Cho, Eung San, Oratti Kalandar, Navas Khan
Year of Publication 13.08.2020

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Patent

Semiconductor sensor with gel filled cavity

Semiconductor sensor with gel filled cavity

by Kalandar Navas Khan Oratti, Bergere Charles
Year of Publication 25.10.2016

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Patent

ELECTRONIC COMPONENT PACKAGE WITH HEATSINK AND MULTIPLE ELECTRONIC COMPONENTS

ELECTRONIC COMPONENT PACKAGE WITH HEATSINK AND MULTIPLE ELECTRONIC COMPONENTS

by ORATTI KALANDAR, NAVAS KHAN, LAKHERA, NISHANT, SINGH, AKHILESH KUMAR
Year of Publication 26.04.2018

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Patent

Electronic component package with heatsink and multiple electronic components

Electronic component package with heatsink and multiple electronic components

by Oratti Kalandar, Navas Khan, Singh, Akhilesh Kumar, Lakhera, Nishant
Year of Publication 24.04.2018

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Patent

APPARATUS AND METHODS FOR MULTI-DIE PACKAGING

APPARATUS AND METHODS FOR MULTI-DIE PACKAGING

by SINGH Akhilesh K, LAKHERA Nishant, KALANDAR Navas Khan Oratti
Year of Publication 22.02.2018

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Patent

STACKABLE MOLDED PACKAGES AND METHODS OF MANUFACTURE THEREOF

STACKABLE MOLDED PACKAGES AND METHODS OF MANUFACTURE THEREOF

by Lakhera Nishant, Oratti Kalandar Navas Khan, Singh Akhilesh Kumar
Year of Publication 22.02.2018

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Patent

BALL GRID ARRAY PACKAGE WITH MORE SIGNAL ROUTING STRUCTURES

BALL GRID ARRAY PACKAGE WITH MORE SIGNAL ROUTING STRUCTURES

by MUNIANDY KESVAKUMAR V.C, KALANDAR NAVAS KHAN ORATTI
Year of Publication 25.02.2016

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Patent

Package with support structure

Package with support structure

by Montoriol, Gilles, Duong, Trung, Oratti Kalandar, Navas Khan, Singh, Akhilesh Kumar, Lakhera, Nishant
Year of Publication 01.10.2019

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Patent

SEMICONDUCTOR SENSOR WITH GEL FILLED CAVITY

SEMICONDUCTOR SENSOR WITH GEL FILLED CAVITY

by BERGERE CHARLES, KALANDAR NAVAS KHAN ORATTI
Year of Publication 22.10.2015

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Patent

Apparatus and Methods for Multi-Die Packaging

Apparatus and Methods for Multi-Die Packaging

by ORATTI KALANDAR Navas Khan, SINGH Akhilesh K, LAKHERA Nishant
Year of Publication 28.09.2017

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Patent

Integrated circuit package having two substrates

Integrated circuit package having two substrates

by Kalandar Navas Khan Oratti, Tan Lan Chu, Verma Chetan
Year of Publication 01.08.2017

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Patent

PACKAGE WITH SUPPORT STRUCTURE

PACKAGE WITH SUPPORT STRUCTURE

by Montoriol, Gilles, Duong, Trung, Oratti Kalandar, Navas Khan, Singh, Akhilesh Kumar, Lakhera, Nishant
Year of Publication 13.06.2019

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Patent