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Yu-Shiang Huang, Ya-Jui Tsou, Chih-Hsiung Huang, Chih-Hao Huang, Huang-Siang Lan, Chee Wee Liu, Yi-Chiau Huang, Hua Chung, Chorng-Ping Chang, Chu, Schubert S., Kuppurao, Satheesh
Published in IEEE transactions on electron devices (01.06.2017)
Published in IEEE transactions on electron devices (01.06.2017)
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Published in Journal of crystal growth (01.02.1996)
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Published in 2016 IEEE International Electron Devices Meeting (IEDM) (01.12.2016)
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Conference Proceeding
High-Mobility CVD-Grown Ge/Strained Ge 0.9 Sn 0.1 /Ge Quantum-Well pMOSFETs on Si by Optimizing Ge Cap Thickness
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Published in IEEE transactions on electron devices (01.06.2017)
Published in IEEE transactions on electron devices (01.06.2017)
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High Tensile Strained In-Situ Phosphorus Doped Silicon Epitaxial Film for nMOS Applications
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Published in ECS transactions (15.03.2013)
Published in ECS transactions (15.03.2013)
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The first GeSn FinFET on a novel GeSnOI substrate achieving lowest S of 79 mV/decade and record high Gm, int of 807 μS/μm for GeSn P-FETs
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Published in 2017 Symposium on VLSI Technology (01.06.2017)
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Year of Publication 01.11.2018
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Published in IEEE transactions on electron devices (01.01.2013)
Published in IEEE transactions on electron devices (01.01.2013)
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A COATED LINER ASSEMBLY FOR A SEMICONDUCTOR PROCESSING CHAMBER
PATALAY KAILASH KIRAN, BRILLHART PAUL, RANISH JOSEPH M, KUPPURAO SATHEESH
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Fabrication of Si1―xGex/Si pMOSFETs Using Corrugated Substrates for Improved ION and Reduced Layout-Width Dependence
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Published in IEEE transactions on electron devices (2013)
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Published in IEEE transactions on electron devices (2013)
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METHODS FOR DEPOSITING LAYERS HAVING REDUCED INTERFACIAL CONTAMINATION
KIM, YI HWAN, TANG, JIN SONG, SANCHEZ ERROL, KUPPURAO SATHEESH, VATUS JEAN R
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Heavily Phosphorus Doped Silicon Junctions for nMOS Applications
Chopra, Saurabh, Ye, Zhiyuan, Zojaji, Ali, Kim, Yihwan, Kuppurao, Satheesh
Published in ECS transactions (24.10.2008)
Published in ECS transactions (24.10.2008)
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Fabrication of \hbox\hbox/\hbox pMOSFETs Using Corrugated Substrates for Improved I and Reduced Layout-Width Dependence
Ho, B., Nuo Xu, Wood, B., Vinh Tran, Chopra, S., Yihwan Kim, Bich-Yen Nguyen, Bonnin, O., Mazure, C., Kuppurao, S., Chorng-Ping Chang, Tsu-Jae King Liu
Published in IEEE transactions on electron devices (01.01.2013)
Published in IEEE transactions on electron devices (01.01.2013)
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UPPER DOME AND LOWER DOME OF QUARTZ
STEVE ABOAGYE, SURAJIT KUMAR, CARLSON DAVID K, LAU SHU-KWAN, CHANG ANZHONG, JOSEPH M RANISH, PAUL BRILLHART, ANH N NGUYEN, HERMAN DINIZ, KAILASH KIRAN PATALAY, MEHMET TUGRUL SAMIR, ZHU ZUOMING, IU DONGMING, OLEG SEREBRYANOV, KUPPURAO SATHEESH
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Year of Publication 17.01.2019
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