TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip
Akopyan, Filipp, Sawada, Jun, Cassidy, Andrew, Alvarez-Icaza, Rodrigo, Arthur, John, Merolla, Paul, Imam, Nabil, Nakamura, Yutaka, Datta, Pallab, Gi-Joon Nam, Taba, Brian, Beakes, Michael, Brezzo, Bernard, Kuang, Jente B., Manohar, Rajit, Risk, William P., Jackson, Bryan, Modha, Dharmendra S.
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.10.2015)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.10.2015)
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Journal Article
Interplay Between Process-Induced and Statistical Variability in 14-nm CMOS Technology Double-Gate SOI FinFETs
Xingsheng Wang, Binjie Cheng, Brown, Andrew Robert, Millar, Campbell, Kuang, Jente B., Nassif, Sani, Asenov, Asen
Published in IEEE transactions on electron devices (01.08.2013)
Published in IEEE transactions on electron devices (01.08.2013)
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Journal Article
Impact of statistical variability and charge trapping on 14 nm SOI FinFET SRAM cell stability
Xingsheng Wang, Binjie Cheng, Brown, Andrew R., Millar, Campbell, Kuang, Jente B., Nassif, Sani, Asenov, Asen
Published in 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) (01.09.2013)
Published in 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) (01.09.2013)
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Conference Proceeding
The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM
Kuang, J. B., Schaub, J. D., Gebara, F. H., Wendel, D., Frohnel, T., Saroop, S., Nassif, S., Nowka, K.
Published in IEEE transactions on circuits and systems. I, Regular papers (01.09.2011)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.09.2011)
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Journal Article
TCAD/Physics-Based Analysis of High-Density Dual-BOX FD/SOI SRAM Cell With Improved Stability
Keunwoo Kim, Kuang, J.B., Gebara, F.H., Ngo, H.C., Ching-Te Chuang, Nowka, K.J.
Published in IEEE transactions on electron devices (01.12.2009)
Published in IEEE transactions on electron devices (01.12.2009)
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Journal Article
A 1 MB Cache Subsystem Prototype With 1.8 ns Embedded DRAMs in 45 nm SOI CMOS
Klim, P.J., Barth, J., Reohr, W.R., Dick, D., Fredeman, G., Koch, G., Le, H.M., Khargonekar, A., Wilcox, P., Golz, J., Kuang, J.B., Mathews, A., Law, J.C., Luong, T., Ngo, H.C., Freese, R., Hunter, H.C., Nelson, E., Parries, P., Kirihata, T., Iyer, S.S.
Published in IEEE journal of solid-state circuits (01.04.2009)
Published in IEEE journal of solid-state circuits (01.04.2009)
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Conference Proceeding
Design Considerations for PD/SOI SRAM: Impact of Gate Leakage and Threshold Voltage Variation
Kanj, R., Joshi, R.V., Sivagnaname, J., Kuang, J.B., Acharyya, D., Nguyen, T.Y., Nassif, S.
Published in IEEE transactions on semiconductor manufacturing (01.02.2008)
Published in IEEE transactions on semiconductor manufacturing (01.02.2008)
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Journal Article
Conference Proceeding
Variability Aware Simulation Based Design- Technology Cooptimization (DTCO) Flow in 14 nm FinFET/SRAM Cooptimization
Asenov, Asen, Cheng, Binjie, Xingsheng Wang, Brown, Andrew Robert, Millar, Campbell, Alexander, Craig, Amoroso, Salvatore Maria, Kuang, Jente B., Nassif, Sani R.
Published in IEEE transactions on electron devices (01.06.2015)
Published in IEEE transactions on electron devices (01.06.2015)
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Journal Article
SRAM bitline circuits on PD SOI: advantages and concerns
Kuang, J.B., Ratanaphanyarat, S., Saccamango, M.J., Hsu, L.L.-C., Flaker, R.C., Wagner, L.F., Chu, S.-F. S., Shahidi, G.G.
Published in IEEE journal of solid-state circuits (01.06.1997)
Published in IEEE journal of solid-state circuits (01.06.1997)
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Journal Article
Low-power high-performance asymmetrical double-gate circuits using back-gate-controlled wide-tunable-range diode voltage : Simulation and modeling of nanoelectronics devices
KIM, Keunwoo, CHUANG, Ching-Te, KUANG, Jente B, NGO, Hung C, NOWKA, Kevin J
Published in IEEE transactions on electron devices (2007)
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Published in IEEE transactions on electron devices (2007)
Journal Article
Stable high-density FD/SOI SRAM with selective back-gate bias using dual buried oxide
Keunwoo Kim, Kuang, J.B., Gebara, F., Ngo, H.C., Ching-Te Chuang, Nowka, K.J.
Published in 2008 IEEE International SOI Conference (01.10.2008)
Published in 2008 IEEE International SOI Conference (01.10.2008)
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Conference Proceeding