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Subthreshold current reduction for decoded-driver by self-reverse biasing (DRAMs)
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Published in IEEE journal of solid-state circuits (01.11.1993)
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Year of Publication 12.07.1995
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SEMICONDUCTOR DEVICE
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Year of Publication 12.07.1995
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Year of Publication 12.07.1995
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Year of Publication 15.03.1995
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Year of Publication 15.03.1995
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SEMICONDUCTOR DEVICE
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Year of Publication 04.06.1987
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Year of Publication 04.06.1987
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A 29-ns 64-Mb DRAM with hierarchical array architecture
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Published in IEEE journal of solid-state circuits (01.09.1996)
Published in IEEE journal of solid-state circuits (01.09.1996)
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