Testing of Interconnect Defects in Memory Based Reconfigurable Logic Device (MRLD)
Senling Wang, Higami, Yoshinobu, Takahashi, Hiroshi, Sato, Masayuki, Katsu, Mitsunori, Sekiguchi, Shoichi
Published in 2017 IEEE 26th Asian Test Symposium (ATS) (01.11.2017)
Published in 2017 IEEE 26th Asian Test Symposium (ATS) (01.11.2017)
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Conference Proceeding
SEMICONDUCTOR DEVICE
KOIZUMI Hiroaki, SEKIGUCHI Shoichi, FUJIKAWA Iwao, KATSU Mitsunori, YOSHIDA Hideaki
Year of Publication 08.04.2021
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Year of Publication 08.04.2021
Patent
MNN: A Solution to Implement Neural Networks into a Memory-based Reconfigurable Logic Device (MRLD)
Zhou, Xihong, Wang, Senling, Higami, Yoshinobu, Takahashi, Hiroshi, Katsu, Mitsunori, Sekiguchi, Shoichi
Published in 2021 36th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) (27.06.2021)
Published in 2021 36th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) (27.06.2021)
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Conference Proceeding